xref: /optee_os/core/arch/arm/plat-corstone1000/main.c (revision eaee88fbcac6dcc15fe1d1a758b53eb2b66cfc60)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (c) 2022, Arm Limited
4  */
5 
6 #include <console.h>
7 #include <drivers/gic.h>
8 #include <drivers/pl011.h>
9 #include <kernel/boot.h>
10 #include <mm/core_mmu.h>
11 #include <platform_config.h>
12 #include <stdint.h>
13 #include <trace.h>
14 
15 static struct pl011_data console_data __nex_bss;
16 
17 register_ddr(DRAM0_BASE, DRAM0_SIZE);
18 
19 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
20 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICD_BASE, GIC_DIST_REG_SIZE);
21 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GICC_BASE, GIC_CPU_REG_SIZE);
22 
boot_primary_init_intc(void)23 void boot_primary_init_intc(void)
24 {
25 	gic_init(GICC_BASE, GICD_BASE);
26 }
27 
boot_secondary_init_intc(void)28 void boot_secondary_init_intc(void)
29 {
30 	gic_init_per_cpu();
31 }
32 
plat_console_init(void)33 void plat_console_init(void)
34 {
35 	pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ,
36 		   CONSOLE_BAUDRATE);
37 	register_serial_console(&console_data.chip);
38 }
39