xref: /optee_os/core/arch/arm/plat-uniphier/main.c (revision 55ab8f06a831946a49717446cd2e4495a2b5d659)
1aeb5ba43SKunihiko Hayashi // SPDX-License-Identifier: BSD-2-Clause
2aeb5ba43SKunihiko Hayashi /*
3aeb5ba43SKunihiko Hayashi  * Copyright (c) 2015, Linaro Limited
4aeb5ba43SKunihiko Hayashi  * Copyright (c) 2017, Socionext Inc.
5aeb5ba43SKunihiko Hayashi  */
6aeb5ba43SKunihiko Hayashi 
7aeb5ba43SKunihiko Hayashi #include <console.h>
8aeb5ba43SKunihiko Hayashi #include <drivers/gic.h>
9aeb5ba43SKunihiko Hayashi #include <drivers/serial8250_uart.h>
10aeb5ba43SKunihiko Hayashi #include <io.h>
1165401337SJens Wiklander #include <kernel/boot.h>
12aeb5ba43SKunihiko Hayashi #include <kernel/panic.h>
13aeb5ba43SKunihiko Hayashi #include <mm/tee_pager.h>
14aeb5ba43SKunihiko Hayashi #include <platform_config.h>
15aeb5ba43SKunihiko Hayashi #include <stdint.h>
16aeb5ba43SKunihiko Hayashi 
17aeb5ba43SKunihiko Hayashi register_phys_mem_pgdir(MEM_AREA_IO_SEC,
18aeb5ba43SKunihiko Hayashi 			ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE),
19aeb5ba43SKunihiko Hayashi 			CORE_MMU_PGDIR_SIZE);
20aeb5ba43SKunihiko Hayashi 
21aeb5ba43SKunihiko Hayashi register_phys_mem_pgdir(MEM_AREA_IO_SEC,
22aeb5ba43SKunihiko Hayashi 			ROUNDDOWN(GIC_BASE, CORE_MMU_PGDIR_SIZE),
23aeb5ba43SKunihiko Hayashi 			CORE_MMU_PGDIR_SIZE);
24aeb5ba43SKunihiko Hayashi 
25aeb5ba43SKunihiko Hayashi register_phys_mem_pgdir(MEM_AREA_IO_SEC,
26aeb5ba43SKunihiko Hayashi 			ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE),
27aeb5ba43SKunihiko Hayashi 			CORE_MMU_PGDIR_SIZE);
28aeb5ba43SKunihiko Hayashi 
29aeb5ba43SKunihiko Hayashi #ifdef DRAM0_BASE
30aeb5ba43SKunihiko Hayashi register_ddr(DRAM0_BASE, DRAM0_SIZE);
31aeb5ba43SKunihiko Hayashi #endif
32aeb5ba43SKunihiko Hayashi #ifdef DRAM1_BASE
33aeb5ba43SKunihiko Hayashi register_ddr(DRAM1_BASE, DRAM1_SIZE);
34aeb5ba43SKunihiko Hayashi #endif
35aeb5ba43SKunihiko Hayashi 
36aeb5ba43SKunihiko Hayashi static struct serial8250_uart_data console_data;
37aeb5ba43SKunihiko Hayashi 
boot_primary_init_intc(void)38df913c6dSAlvin Chang void boot_primary_init_intc(void)
39aeb5ba43SKunihiko Hayashi {
400ee3f52eSEtienne Carriere 	gic_init(GIC_BASE + GICC_OFFSET, GIC_BASE + GICD_OFFSET);
41aeb5ba43SKunihiko Hayashi }
42aeb5ba43SKunihiko Hayashi 
plat_console_init(void)43*55ab8f06SAlvin Chang void plat_console_init(void)
44aeb5ba43SKunihiko Hayashi {
45aeb5ba43SKunihiko Hayashi 	/* Init UART */
46aeb5ba43SKunihiko Hayashi 	serial8250_uart_init(&console_data, CONSOLE_UART_BASE,
47aeb5ba43SKunihiko Hayashi 			     CONSOLE_UART_CLK_IN_HZ, CONSOLE_BAUDRATE);
48aeb5ba43SKunihiko Hayashi 
49aeb5ba43SKunihiko Hayashi 	/* Register console */
50aeb5ba43SKunihiko Hayashi 	register_serial_console(&console_data.chip);
51aeb5ba43SKunihiko Hayashi }
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