1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (c) 2015, Linaro Limited 4 */ 5 6 #ifndef PLATFORM_CONFIG_H 7 #define PLATFORM_CONFIG_H 8 9 #include <mm/generic_ram_layout.h> 10 11 /* Make stacks aligned to data cache line length */ 12 #define STACK_ALIGNMENT 64 13 14 #ifdef ARM64 15 #ifdef CFG_WITH_PAGER 16 #error "Pager not supported for ARM64" 17 #endif 18 #endif /*ARM64*/ 19 20 #if defined(PLATFORM_FLAVOR_mt8173) 21 22 #define GIC_BASE 0x10220000 23 #define GICC_OFFSET 0x2000 24 #define GICD_OFFSET 0x1000 25 26 #define UART0_BASE 0x11002000 27 #define UART1_BASE 0x11003000 28 #define UART2_BASE 0x11004000 29 #define UART3_BASE 0x11005000 30 31 #define CONSOLE_UART_BASE UART0_BASE 32 #define CONSOLE_BAUDRATE 921600 33 #define CONSOLE_UART_CLK_IN_HZ 26000000 34 35 #define DRAM0_BASE 0x40000000 36 #define DRAM0_SIZE 0x80000000 37 38 #elif defined(PLATFORM_FLAVOR_mt8175) 39 40 #define GIC_BASE 0x0C000000 41 #define GICC_OFFSET 0x400000 42 #define GICD_OFFSET 0x0 43 44 #define UART0_BASE 0x11002000 45 #define UART1_BASE 0x11103000 46 #define UART2_BASE 0x11104000 47 48 #define CONSOLE_UART_BASE UART0_BASE 49 #define CONSOLE_BAUDRATE 921600 50 #define CONSOLE_UART_CLK_IN_HZ 26000000 51 52 #elif defined(PLATFORM_FLAVOR_mt8516) 53 54 #define GIC_BASE 0x10310000 55 #define GICC_OFFSET 0x10000 56 #define GICD_OFFSET 0x00000 57 58 #define UART0_BASE 0x11005000 59 #define UART1_BASE 0x11106000 60 #define UART2_BASE 0x11107000 61 62 #define CONSOLE_UART_BASE UART0_BASE 63 #define CONSOLE_BAUDRATE 921600 64 #define CONSOLE_UART_CLK_IN_HZ 26000000 65 66 #elif defined(PLATFORM_FLAVOR_mt8183) 67 68 #define GIC_BASE 0x0C000000 69 #define GICC_OFFSET 0x400000 70 #define GICD_OFFSET 0x0 71 72 #define UART0_BASE 0x11002000 73 #define UART1_BASE 0x11103000 74 #define UART2_BASE 0x11104000 75 76 #define CONSOLE_UART_BASE UART0_BASE 77 #define CONSOLE_BAUDRATE 921600 78 #define CONSOLE_UART_CLK_IN_HZ 26000000 79 80 #elif defined(PLATFORM_FLAVOR_mt8195) 81 82 #define GIC_BASE 0x0C000000 83 #define GICC_OFFSET 0x400000 84 #define GICD_OFFSET 0x0 85 86 #define UART0_BASE 0x11001100 87 #define UART1_BASE 0x11101200 88 #define UART2_BASE 0x11101300 89 90 #define CONSOLE_UART_BASE UART0_BASE 91 #define CONSOLE_BAUDRATE 921600 92 #define CONSOLE_UART_CLK_IN_HZ 26000000 93 94 #elif defined(PLATFORM_FLAVOR_mt8188) 95 96 #define GIC_BASE 0x0C000000 97 #define GICC_OFFSET 0x400000 98 #define GICD_OFFSET 0x0 99 100 #define UART0_BASE 0x11001100 101 #define UART1_BASE 0x11101200 102 #define UART2_BASE 0x11101300 103 104 #define CONSOLE_UART_BASE UART0_BASE 105 #define CONSOLE_BAUDRATE 115200 106 #define CONSOLE_UART_CLK_IN_HZ 26000000 107 108 #elif defined(PLATFORM_FLAVOR_mt7988) 109 110 #define GIC_BASE 0x0C000000 111 #define GICC_OFFSET 0x400000 112 #define GICD_OFFSET 0x000000 113 114 #define UART0_BASE 0x11000000 115 #define UART1_BASE 0x11000100 116 #define UART2_BASE 0x11000200 117 118 #define CONSOLE_UART_BASE UART0_BASE 119 #define CONSOLE_BAUDRATE 115200 120 #define CONSOLE_UART_CLK_IN_HZ 40000000 121 122 #else 123 #error "Unknown platform flavor" 124 #endif 125 126 #ifdef CFG_MTK_RESERVED_VA 127 #define MAX_XLAT_TABLES (30 + (CFG_RESERVED_VASPACE_SIZE) / \ 128 (CORE_MMU_PGDIR_SIZE) + 1) 129 #endif 130 131 #endif /*PLATFORM_CONFIG_H*/ 132