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Searched refs:dpcd (Results 1 – 25 of 49) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A Ddrm_dp_helper.c135 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_link_train_clock_recovery_delay()
137 unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_clock_recovery_delay()
144 if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in drm_dp_link_train_clock_recovery_delay()
153 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_link_train_channel_eq_delay()
155 unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_channel_eq_delay()
386 bool drm_dp_downstream_is_type(const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_downstream_is_type()
389 return drm_dp_is_branch(dpcd) && in drm_dp_downstream_is_type()
390 dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_downstream_is_type()
403 bool drm_dp_downstream_is_tmds(const u8 dpcd[DP_RECEIVER_CAP_SIZE], in drm_dp_downstream_is_tmds()
407 if (dpcd[DP_DPCD_REV] < 0x11) { in drm_dp_downstream_is_tmds()
[all …]
/OK3568_Linux_fs/kernel/include/drm/
H A Ddrm_dp_helper.h1189 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1190 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1391 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_link_rate()
1393 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in drm_dp_max_link_rate()
1397 drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_lane_count()
1399 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
1403 drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_enhanced_frame_cap()
1405 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
1406 (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); in drm_dp_enhanced_frame_cap()
1410 drm_dp_fast_training_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_fast_training_cap()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c43 return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc); in nouveau_dp_has_sink_count()
55 u8 *dpcd = outp->dp.dpcd; in nouveau_dp_probe_dpcd() local
57 ret = drm_dp_read_dpcd_caps(aux, dpcd); in nouveau_dp_probe_dpcd()
61 ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd)); in nouveau_dp_probe_dpcd()
68 mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd); in nouveau_dp_probe_dpcd()
86 ret = drm_dp_read_downstream_info(aux, dpcd, in nouveau_dp_probe_dpcd()
109 u8 *dpcd = nv_encoder->dp.dpcd; in nouveau_dp_detect() local
116 dpcd[DP_DPCD_REV] != 0) in nouveau_dp_detect()
146 nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE]; in nouveau_dp_detect()
148 dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in nouveau_dp_detect()
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Ddrm_dp_helper.c109 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_link_train_clock_recovery_delay()
111 int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_clock_recovery_delay()
117 if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in drm_dp_link_train_clock_recovery_delay()
123 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_link_train_channel_eq_delay()
125 int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_link_train_channel_eq_delay()
261 u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_read_extended_dpcd_caps()
273 if (!(dpcd[DP_TRAINING_AUX_RD_INTERVAL] & in drm_dp_read_extended_dpcd_caps()
284 if (dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) { in drm_dp_read_extended_dpcd_caps()
286 aux->name, dpcd[DP_DPCD_REV], dpcd_ext[DP_DPCD_REV]); in drm_dp_read_extended_dpcd_caps()
290 if (!memcmp(dpcd, dpcd_ext, sizeof(dpcd_ext))) in drm_dp_read_extended_dpcd_caps()
[all …]
H A Danalogix_dp.c248 u8 dpcd = 0; in analogix_dp_tps3_supported() local
252 analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LANE_COUNT, &dpcd); in analogix_dp_tps3_supported()
253 sink_tps3_supported = dpcd & DP_TPS3_SUPPORTED; in analogix_dp_tps3_supported()
265 drm_dp_link_train_clock_recovery_delay(dp->dpcd); in analogix_dp_process_clock_recovery()
342 drm_dp_link_train_channel_eq_delay(dp->dpcd); in analogix_dp_process_equalizer_training()
437 u8 dpcd; in analogix_dp_init_training() local
455 analogix_dp_read_byte_from_dpcd(dp, DP_MAX_DOWNSPREAD, &dpcd); in analogix_dp_init_training()
456 dp->link_train.ssc = !!(dpcd & DP_MAX_DOWNSPREAD_0_5); in analogix_dp_init_training()
792 if (dp->dpcd[DP_DPCD_REV] < 0x11) in analogix_dp_link_power_up()
816 if (dp->dpcd[DP_DPCD_REV] < 0x11) in analogix_dp_link_power_down()
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H A Ddw-dp.c193 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
550 u8 dpcd; in dw_dp_link_probe() local
553 ret = drm_dp_read_dpcd_caps(&dp->aux, link->dpcd); in dw_dp_link_probe()
558 &dpcd); in dw_dp_link_probe()
563 !!(dpcd & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED); in dw_dp_link_probe()
565 link->revision = link->dpcd[DP_DPCD_REV]; in dw_dp_link_probe()
567 drm_dp_max_link_rate(link->dpcd)); in dw_dp_link_probe()
569 drm_dp_max_lane_count(link->dpcd)); in dw_dp_link_probe()
571 link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(link->dpcd); in dw_dp_link_probe()
572 link->caps.tps3_supported = drm_dp_tps3_supported(link->dpcd); in dw_dp_link_probe()
[all …]
/OK3568_Linux_fs/u-boot/include/drm/
H A Ddrm_dp_helper.h1019 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1020 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
1117 drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_link_rate()
1119 return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in drm_dp_max_link_rate()
1123 drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_max_lane_count()
1125 return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in drm_dp_max_lane_count()
1129 drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_enhanced_frame_cap()
1131 return dpcd[DP_DPCD_REV] >= 0x11 && in drm_dp_enhanced_frame_cap()
1132 (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); in drm_dp_enhanced_frame_cap()
1136 drm_dp_tps3_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) in drm_dp_tps3_supported()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c250 const u8 dpcd[DP_DPCD_SIZE], in amdgpu_atombios_dp_get_dp_link_config()
257 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
258 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in amdgpu_atombios_dp_get_dp_link_config()
319 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in amdgpu_atombios_dp_probe_oui()
336 if (dig_connector->dpcd[DP_DPCD_REV] > 0x10) { in amdgpu_atombios_dp_ds_ports()
356 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in amdgpu_atombios_dp_get_dpcd()
358 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in amdgpu_atombios_dp_get_dpcd()
359 dig_connector->dpcd); in amdgpu_atombios_dp_get_dpcd()
366 dig_connector->dpcd[0] = 0; in amdgpu_atombios_dp_get_dpcd()
418 ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd, in amdgpu_atombios_dp_set_link_config()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/analogix/
H A Danalogix-anx6345.c64 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
100 u8 dp_bw, dpcd[2]; in anx6345_dp_link_training() local
135 &anx6345->dpcd, DP_RECEIVER_CAP_SIZE); in anx6345_dp_link_training()
151 if (anx6345->dpcd[DP_DPCD_REV] >= 0x11) { in anx6345_dp_link_training()
152 err = drm_dp_dpcd_readb(&anx6345->aux, DP_SET_POWER, &dpcd[0]); in anx6345_dp_link_training()
159 dpcd[0] &= ~DP_SET_POWER_MASK; in anx6345_dp_link_training()
160 dpcd[0] |= DP_SET_POWER_D0; in anx6345_dp_link_training()
162 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_SET_POWER, dpcd[0]); in anx6345_dp_link_training()
183 if (anx6345->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) { in anx6345_dp_link_training()
202 if (drm_dp_enhanced_frame_cap(anx6345->dpcd)) in anx6345_dp_link_training()
[all …]
H A Danalogix-anx78xx.c83 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
606 u8 dp_bw, dpcd[2]; in anx78xx_dp_link_training() local
647 &anx78xx->dpcd, DP_RECEIVER_CAP_SIZE); in anx78xx_dp_link_training()
663 if (anx78xx->dpcd[DP_DPCD_REV] >= 0x11) { in anx78xx_dp_link_training()
664 err = drm_dp_dpcd_readb(&anx78xx->aux, DP_SET_POWER, &dpcd[0]); in anx78xx_dp_link_training()
671 dpcd[0] &= ~DP_SET_POWER_MASK; in anx78xx_dp_link_training()
672 dpcd[0] |= DP_SET_POWER_D0; in anx78xx_dp_link_training()
674 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_SET_POWER, dpcd[0]); in anx78xx_dp_link_training()
695 if (anx78xx->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) { in anx78xx_dp_link_training()
714 if (drm_dp_enhanced_frame_cap(anx78xx->dpcd)) in anx78xx_dp_link_training()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Dcdn-dp-link-training.c72 if (drm_dp_enhanced_frame_cap(dp->dpcd) || in cdn_dp_set_pattern()
78 dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_FRAMING_CHANGE_CAP) in cdn_dp_set_pattern()
139 if (drm_dp_tps3_supported(dp->dpcd)) in cdn_dp_select_chaneq_pattern()
233 drm_dp_link_train_clock_recovery_delay(dp->dpcd); in cdn_dp_link_training_clock_recovery()
295 drm_dp_link_train_channel_eq_delay(dp->dpcd); in cdn_dp_link_training_channel_equalization()
366 ret = drm_dp_dpcd_read(&dp->aux, DP_DPCD_REV, dp->dpcd, in cdn_dp_software_train_link()
367 sizeof(dp->dpcd)); in cdn_dp_software_train_link()
374 sink_max = drm_dp_max_lane_count(dp->dpcd); in cdn_dp_software_train_link()
378 sink_max = drm_dp_max_link_rate(dp->dpcd); in cdn_dp_software_train_link()
382 ssc_on = !!(dp->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5); in cdn_dp_software_train_link()
[all …]
H A Ddw-dp.c291 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
1377 memset(link->dpcd, 0, sizeof(link->dpcd)); in dw_dp_link_reset()
1431 static bool dw_dp_has_sink_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE], in dw_dp_has_sink_count()
1434 return dpcd[DP_DPCD_REV] >= DP_DPCD_REV_11 && in dw_dp_has_sink_count()
1435 dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT && in dw_dp_has_sink_count()
1442 u8 dpcd; in dw_dp_link_probe() local
1447 ret = drm_dp_read_dpcd_caps(&dp->aux, link->dpcd); in dw_dp_link_probe()
1451 drm_dp_read_desc(&dp->aux, &link->desc, drm_dp_is_branch(link->dpcd)); in dw_dp_link_probe()
1453 if (dw_dp_has_sink_count(link->dpcd, &link->desc)) { in dw_dp_link_probe()
1466 &dpcd); in dw_dp_link_probe()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/dp/
H A Ddp_panel.c29 u8 *dpcd, major = 0, minor = 0, temp; in dp_panel_read_dpcd() local
32 dpcd = dp_panel->dpcd; in dp_panel_read_dpcd()
38 dpcd, (DP_RECEIVER_CAP_SIZE + 1)); in dp_panel_read_dpcd()
49 temp = dpcd[DP_TRAINING_AUX_RD_INTERVAL]; in dp_panel_read_dpcd()
58 dpcd, (DP_RECEIVER_CAP_SIZE + 1)); in dp_panel_read_dpcd()
69 link_info->revision = dpcd[DP_DPCD_REV]; in dp_panel_read_dpcd()
73 link_info->rate = drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); in dp_panel_read_dpcd()
74 link_info->num_lanes = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in dp_panel_read_dpcd()
87 if (drm_dp_enhanced_frame_cap(dpcd)) in dp_panel_read_dpcd()
90 dp_panel->dfp_present = dpcd[DP_DOWNSTREAMPORT_PRESENT]; in dp_panel_read_dpcd()
[all …]
H A Ddp_ctrl.c128 u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_config_ctrl() local
134 if (dpcd[DP_EDP_CONFIGURATION_CAP] & DP_ALTERNATE_SCRAMBLER_RESET_CAP) in dp_ctrl_config_ctrl()
151 if (drm_dp_enhanced_frame_cap(dpcd)) in dp_ctrl_config_ctrl()
1099 drm_dp_link_train_clock_recovery_delay(ctrl->panel->dpcd); in dp_ctrl_link_train_1()
1180 drm_dp_link_train_channel_eq_delay(ctrl->panel->dpcd); in dp_ctrl_clear_training_pattern()
1195 if (drm_dp_tps3_supported(ctrl->panel->dpcd)) in dp_ctrl_link_train_2()
1211 drm_dp_link_train_channel_eq_delay(ctrl->panel->dpcd); in dp_ctrl_link_train_2()
1415 u8 *dpcd = ctrl->panel->dpcd; in dp_ctrl_use_fixed_nvid() local
1423 if (drm_dp_is_branch(dpcd)) in dp_ctrl_use_fixed_nvid()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Datombios_dp.c306 const u8 dpcd[DP_DPCD_SIZE], in radeon_dp_get_dp_link_config()
312 unsigned max_link_rate = drm_dp_max_link_rate(dpcd); in radeon_dp_get_dp_link_config()
313 unsigned max_lane_num = drm_dp_max_lane_count(dpcd); in radeon_dp_get_dp_link_config()
374 if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in radeon_dp_probe_oui()
395 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE); in radeon_dp_getdpcd()
397 DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd), in radeon_dp_getdpcd()
398 dig_connector->dpcd); in radeon_dp_getdpcd()
405 dig_connector->dpcd[0] = 0; in radeon_dp_getdpcd()
462 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_set_link_config()
489 ret = radeon_dp_get_dp_link_config(connector, dig_connector->dpcd, in radeon_dp_mode_valid_helper()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/tegra/
H A Ddp.c172 u8 dpcd[DP_RECEIVER_CAP_SIZE], value; in drm_dp_link_probe() local
178 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, dpcd, sizeof(dpcd)); in drm_dp_link_probe()
182 link->revision = dpcd[DP_DPCD_REV]; in drm_dp_link_probe()
183 link->max_rate = drm_dp_max_link_rate(dpcd); in drm_dp_link_probe()
184 link->max_lanes = drm_dp_max_lane_count(dpcd); in drm_dp_link_probe()
186 link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(dpcd); in drm_dp_link_probe()
187 link->caps.tps3_supported = drm_dp_tps3_supported(dpcd); in drm_dp_link_probe()
188 link->caps.fast_training = drm_dp_fast_training_cap(dpcd); in drm_dp_link_probe()
189 link->caps.channel_coding = drm_dp_channel_coding_supported(dpcd); in drm_dp_link_probe()
191 if (drm_dp_alternate_scrambler_reset_cap(dpcd)) { in drm_dp_link_probe()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c198 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_link_training_clock_recovery()
229 if (intel_dp->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) in intel_dp_link_training_clock_recovery()
238 drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd); in intel_dp_link_training_clock_recovery()
302 sink_tps4 = drm_dp_tps4_supported(intel_dp->dpcd); in intel_dp_training_pattern()
319 sink_tps3 = drm_dp_tps3_supported(intel_dp->dpcd); in intel_dp_training_pattern()
357 drm_dp_link_train_channel_eq_delay(intel_dp->dpcd); in intel_dp_link_training_channel_equalization()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddp.c51 if (dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL]) in nvkm_dp_train_sense()
52 mdelay(dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL] * 4); in nvkm_dp_train_sense()
160 if (lt->dp->dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED) in nvkm_dp_train_eq()
238 dp->dpcd[DPCD_RC02] &= ~DPCD_RC02_TPS3_SUPPORTED; in nvkm_dp_train_links()
239 lt.pc2 = dp->dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED; in nvkm_dp_train_links()
305 if (dp->dpcd[DPCD_RC03] & DPCD_RC03_MAX_DOWNSPREAD) { in nvkm_dp_train_init()
348 const u8 sink_nr = dp->dpcd[DPCD_RC02] & DPCD_RC02_MAX_LANE_COUNT; in nvkm_dp_train()
349 const u8 sink_bw = dp->dpcd[DPCD_RC01_MAX_LINK_RATE]; in nvkm_dp_train()
406 ior->dp.ef = dp->dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP; in nvkm_dp_train()
520 if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, dp->dpcd, in nvkm_dp_enable()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c267 uint8_t dpcd[4]; member
330 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in cdv_intel_dp_max_lane_count()
331 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()
346 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in cdv_intel_dp_max_link_bw()
1080 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in cdv_intel_dp_mode_set()
1081 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { in cdv_intel_dp_mode_set()
1116 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in cdv_intel_dp_sink_dpms()
1678 if (cdv_intel_dp_aux_native_read(encoder, 0x000, intel_dp->dpcd, in cdv_dp_detect()
1679 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd)) in cdv_dp_detect()
1681 if (intel_dp->dpcd[DP_DPCD_REV] != 0) in cdv_dp_detect()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/panel/
H A Dpanel-maxim-max96772.c295 u32 dpcd; in max96772_panel_prepare() local
298 ret = max96772_aux_dpcd_read(p, DP_MAX_LANE_COUNT, &dpcd); in max96772_panel_prepare()
304 p->lane_count = min_t(int, 4, dpcd & DP_MAX_LANE_COUNT_MASK); in max96772_panel_prepare()
306 ret = max96772_aux_dpcd_read(p, DP_MAX_LINK_RATE, &dpcd); in max96772_panel_prepare()
312 p->link_rate = min_t(int, dpcd, DP_LINK_BW_5_4); in max96772_panel_prepare()
314 ret = max96772_aux_dpcd_read(p, DP_MAX_DOWNSPREAD, &dpcd); in max96772_panel_prepare()
320 p->ssc = !!(dpcd & DP_MAX_DOWNSPREAD_0_5); in max96772_panel_prepare()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/edp/
H A Dedp_ctrl.c95 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
405 u8 max_lane = drm_dp_max_lane_count(ctrl->dpcd); in edp_fill_link_cfg()
415 ctrl->link_rate = ctrl->dpcd[DP_MAX_LINK_RATE]; in edp_fill_link_cfg()
441 if (drm_dp_enhanced_frame_cap(ctrl->dpcd)) in edp_config_ctrl()
611 drm_dp_link_train_clock_recovery_delay(ctrl->dpcd); in edp_start_link_train_1()
668 drm_dp_link_train_channel_eq_delay(ctrl->dpcd); in edp_start_link_train_2()
703 max_lane = drm_dp_max_lane_count(ctrl->dpcd); in edp_link_rate_down_shift()
746 drm_dp_link_train_channel_eq_delay(ctrl->dpcd); in edp_clear_training_pattern()
764 if (drm_dp_enhanced_frame_cap(ctrl->dpcd)) in edp_do_link_train()
974 if (ctrl->dpcd[DP_DPCD_REV] >= 0x11) { in edp_ctrl_on_worker()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c514 kfree(port->dpcd); in clean_virtual_dp_monitor()
515 port->dpcd = NULL; in clean_virtual_dp_monitor()
531 port->dpcd = kzalloc(sizeof(*(port->dpcd)), GFP_KERNEL); in setup_virtual_dp_monitor()
532 if (!port->dpcd) { in setup_virtual_dp_monitor()
541 memcpy(port->dpcd->data, dpcd_fix_data, DPCD_HEADER_SIZE); in setup_virtual_dp_monitor()
542 port->dpcd->data_valid = true; in setup_virtual_dp_monitor()
543 port->dpcd->data[DPCD_SINK_COUNT] = 0x1; in setup_virtual_dp_monitor()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c317 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
710 drm_dp_link_train_clock_recovery_delay(dp->dpcd); in zynqmp_dp_link_train_cr()
758 if (dp->dpcd[DP_DPCD_REV] >= DP_V1_2 && in zynqmp_dp_link_train_ce()
759 dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED) in zynqmp_dp_link_train_ce()
775 drm_dp_link_train_channel_eq_delay(dp->dpcd); in zynqmp_dp_link_train_ce()
809 enhanced = drm_dp_enhanced_frame_cap(dp->dpcd); in zynqmp_dp_train()
815 if (dp->dpcd[3] & 0x1) { in zynqmp_dp_train()
1305 ret = drm_dp_dpcd_read(&dp->aux, 0x0, dp->dpcd, in zynqmp_dp_connector_detect()
1306 sizeof(dp->dpcd)); in zynqmp_dp_connector_detect()
1313 drm_dp_max_link_rate(dp->dpcd), in zynqmp_dp_connector_detect()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c1382 u8 dpcd[DP_RECEIVER_CAP_SIZE]) in cdns_mhdp_fill_sink_caps()
1390 mhdp->sink.ssc = !!(dpcd[DP_MAX_DOWNSPREAD] & in cdns_mhdp_fill_sink_caps()
1395 if (drm_dp_tps3_supported(dpcd)) in cdns_mhdp_fill_sink_caps()
1397 if (drm_dp_tps4_supported(dpcd)) in cdns_mhdp_fill_sink_caps()
1401 mhdp->sink.fast_link = !!(dpcd[DP_MAX_DOWNSPREAD] & in cdns_mhdp_fill_sink_caps()
1407 u8 dpcd[DP_RECEIVER_CAP_SIZE], amp[2]; in cdns_mhdp_link_up() local
1423 err = drm_dp_dpcd_read(&mhdp->aux, addr, dpcd, DP_RECEIVER_CAP_SIZE); in cdns_mhdp_link_up()
1429 mhdp->link.revision = dpcd[0]; in cdns_mhdp_link_up()
1430 mhdp->link.rate = drm_dp_bw_code_to_link_rate(dpcd[1]); in cdns_mhdp_link_up()
1431 mhdp->link.num_lanes = dpcd[2] & DP_MAX_LANE_COUNT_MASK; in cdns_mhdp_link_up()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A Dtc358767.c233 u8 dpcd[DP_RECEIVER_CAP_SIZE]; member
673 ret = drm_dp_dpcd_read(&tc->aux, DP_DPCD_REV, tc->link.dpcd, in tc_get_display_props()
678 revision = tc->link.dpcd[DP_DPCD_REV]; in tc_get_display_props()
679 rate = drm_dp_max_link_rate(tc->link.dpcd); in tc_get_display_props()
680 num_lanes = drm_dp_max_lane_count(tc->link.dpcd); in tc_get_display_props()
716 drm_dp_enhanced_frame_cap(tc->link.dpcd) ? in tc_get_display_props()
994 if (drm_dp_enhanced_frame_cap(tc->link.dpcd)) in tc_main_link_enable()
1041 (drm_dp_enhanced_frame_cap(tc->link.dpcd) ? in tc_main_link_enable()
1192 if (drm_dp_enhanced_frame_cap(tc->link.dpcd)) in tc_stream_enable()

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