1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2009 Red Hat Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Authors: Ben Skeggs
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <drm/drm_dp_helper.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include "nouveau_drv.h"
28*4882a593Smuzhiyun #include "nouveau_connector.h"
29*4882a593Smuzhiyun #include "nouveau_encoder.h"
30*4882a593Smuzhiyun #include "nouveau_crtc.h"
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include <nvif/class.h>
33*4882a593Smuzhiyun #include <nvif/cl5070.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun MODULE_PARM_DESC(mst, "Enable DisplayPort multi-stream (default: enabled)");
36*4882a593Smuzhiyun static int nouveau_mst = 1;
37*4882a593Smuzhiyun module_param_named(mst, nouveau_mst, int, 0400);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static bool
nouveau_dp_has_sink_count(struct drm_connector * connector,struct nouveau_encoder * outp)40*4882a593Smuzhiyun nouveau_dp_has_sink_count(struct drm_connector *connector,
41*4882a593Smuzhiyun struct nouveau_encoder *outp)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun static enum drm_connector_status
nouveau_dp_probe_dpcd(struct nouveau_connector * nv_connector,struct nouveau_encoder * outp)47*4882a593Smuzhiyun nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector,
48*4882a593Smuzhiyun struct nouveau_encoder *outp)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun struct drm_connector *connector = &nv_connector->base;
51*4882a593Smuzhiyun struct drm_dp_aux *aux = &nv_connector->aux;
52*4882a593Smuzhiyun struct nv50_mstm *mstm = NULL;
53*4882a593Smuzhiyun enum drm_connector_status status = connector_status_disconnected;
54*4882a593Smuzhiyun int ret;
55*4882a593Smuzhiyun u8 *dpcd = outp->dp.dpcd;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun ret = drm_dp_read_dpcd_caps(aux, dpcd);
58*4882a593Smuzhiyun if (ret < 0)
59*4882a593Smuzhiyun goto out;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd));
62*4882a593Smuzhiyun if (ret < 0)
63*4882a593Smuzhiyun goto out;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun if (nouveau_mst) {
66*4882a593Smuzhiyun mstm = outp->dp.mstm;
67*4882a593Smuzhiyun if (mstm)
68*4882a593Smuzhiyun mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun if (nouveau_dp_has_sink_count(connector, outp)) {
72*4882a593Smuzhiyun ret = drm_dp_read_sink_count(aux);
73*4882a593Smuzhiyun if (ret < 0)
74*4882a593Smuzhiyun goto out;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun outp->dp.sink_count = ret;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /*
79*4882a593Smuzhiyun * Dongle connected, but no display. Don't bother reading
80*4882a593Smuzhiyun * downstream port info
81*4882a593Smuzhiyun */
82*4882a593Smuzhiyun if (!outp->dp.sink_count)
83*4882a593Smuzhiyun return connector_status_disconnected;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun ret = drm_dp_read_downstream_info(aux, dpcd,
87*4882a593Smuzhiyun outp->dp.downstream_ports);
88*4882a593Smuzhiyun if (ret < 0)
89*4882a593Smuzhiyun goto out;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun status = connector_status_connected;
92*4882a593Smuzhiyun out:
93*4882a593Smuzhiyun if (status != connector_status_connected) {
94*4882a593Smuzhiyun /* Clear any cached info */
95*4882a593Smuzhiyun outp->dp.sink_count = 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun return status;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun int
nouveau_dp_detect(struct nouveau_connector * nv_connector,struct nouveau_encoder * nv_encoder)101*4882a593Smuzhiyun nouveau_dp_detect(struct nouveau_connector *nv_connector,
102*4882a593Smuzhiyun struct nouveau_encoder *nv_encoder)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun struct drm_device *dev = nv_encoder->base.base.dev;
105*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
106*4882a593Smuzhiyun struct drm_connector *connector = &nv_connector->base;
107*4882a593Smuzhiyun struct nv50_mstm *mstm = nv_encoder->dp.mstm;
108*4882a593Smuzhiyun enum drm_connector_status status;
109*4882a593Smuzhiyun u8 *dpcd = nv_encoder->dp.dpcd;
110*4882a593Smuzhiyun int ret = NOUVEAU_DP_NONE;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* If we've already read the DPCD on an eDP device, we don't need to
113*4882a593Smuzhiyun * reread it as it won't change
114*4882a593Smuzhiyun */
115*4882a593Smuzhiyun if (connector->connector_type == DRM_MODE_CONNECTOR_eDP &&
116*4882a593Smuzhiyun dpcd[DP_DPCD_REV] != 0)
117*4882a593Smuzhiyun return NOUVEAU_DP_SST;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun mutex_lock(&nv_encoder->dp.hpd_irq_lock);
120*4882a593Smuzhiyun if (mstm) {
121*4882a593Smuzhiyun /* If we're not ready to handle MST state changes yet, just
122*4882a593Smuzhiyun * report the last status of the connector. We'll reprobe it
123*4882a593Smuzhiyun * once we've resumed.
124*4882a593Smuzhiyun */
125*4882a593Smuzhiyun if (mstm->suspended) {
126*4882a593Smuzhiyun if (mstm->is_mst)
127*4882a593Smuzhiyun ret = NOUVEAU_DP_MST;
128*4882a593Smuzhiyun else if (connector->status ==
129*4882a593Smuzhiyun connector_status_connected)
130*4882a593Smuzhiyun ret = NOUVEAU_DP_SST;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun goto out;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun status = nouveau_dp_probe_dpcd(nv_connector, nv_encoder);
137*4882a593Smuzhiyun if (status == connector_status_disconnected)
138*4882a593Smuzhiyun goto out;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* If we're in MST mode, we're done here */
141*4882a593Smuzhiyun if (mstm && mstm->can_mst && mstm->is_mst) {
142*4882a593Smuzhiyun ret = NOUVEAU_DP_MST;
143*4882a593Smuzhiyun goto out;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE];
147*4882a593Smuzhiyun nv_encoder->dp.link_nr =
148*4882a593Smuzhiyun dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun NV_DEBUG(drm, "display: %dx%d dpcd 0x%02x\n",
151*4882a593Smuzhiyun nv_encoder->dp.link_nr, nv_encoder->dp.link_bw,
152*4882a593Smuzhiyun dpcd[DP_DPCD_REV]);
153*4882a593Smuzhiyun NV_DEBUG(drm, "encoder: %dx%d\n",
154*4882a593Smuzhiyun nv_encoder->dcb->dpconf.link_nr,
155*4882a593Smuzhiyun nv_encoder->dcb->dpconf.link_bw);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr)
158*4882a593Smuzhiyun nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr;
159*4882a593Smuzhiyun if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw)
160*4882a593Smuzhiyun nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun NV_DEBUG(drm, "maximum: %dx%d\n",
163*4882a593Smuzhiyun nv_encoder->dp.link_nr, nv_encoder->dp.link_bw);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun if (mstm && mstm->can_mst) {
166*4882a593Smuzhiyun ret = nv50_mstm_detect(nv_encoder);
167*4882a593Smuzhiyun if (ret == 1) {
168*4882a593Smuzhiyun ret = NOUVEAU_DP_MST;
169*4882a593Smuzhiyun goto out;
170*4882a593Smuzhiyun } else if (ret != 0) {
171*4882a593Smuzhiyun goto out;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun ret = NOUVEAU_DP_SST;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun out:
177*4882a593Smuzhiyun if (mstm && !mstm->suspended && ret != NOUVEAU_DP_MST)
178*4882a593Smuzhiyun nv50_mstm_remove(mstm);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun mutex_unlock(&nv_encoder->dp.hpd_irq_lock);
181*4882a593Smuzhiyun return ret;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
nouveau_dp_irq(struct nouveau_drm * drm,struct nouveau_connector * nv_connector)184*4882a593Smuzhiyun void nouveau_dp_irq(struct nouveau_drm *drm,
185*4882a593Smuzhiyun struct nouveau_connector *nv_connector)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun struct drm_connector *connector = &nv_connector->base;
188*4882a593Smuzhiyun struct nouveau_encoder *outp = find_encoder(connector, DCB_OUTPUT_DP);
189*4882a593Smuzhiyun struct nv50_mstm *mstm;
190*4882a593Smuzhiyun int ret;
191*4882a593Smuzhiyun bool send_hpd = false;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun if (!outp)
194*4882a593Smuzhiyun return;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun mstm = outp->dp.mstm;
197*4882a593Smuzhiyun NV_DEBUG(drm, "service %s\n", connector->name);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun mutex_lock(&outp->dp.hpd_irq_lock);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (mstm && mstm->is_mst) {
202*4882a593Smuzhiyun if (!nv50_mstm_service(drm, nv_connector, mstm))
203*4882a593Smuzhiyun send_hpd = true;
204*4882a593Smuzhiyun } else {
205*4882a593Smuzhiyun drm_dp_cec_irq(&nv_connector->aux);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if (nouveau_dp_has_sink_count(connector, outp)) {
208*4882a593Smuzhiyun ret = drm_dp_read_sink_count(&nv_connector->aux);
209*4882a593Smuzhiyun if (ret != outp->dp.sink_count)
210*4882a593Smuzhiyun send_hpd = true;
211*4882a593Smuzhiyun if (ret >= 0)
212*4882a593Smuzhiyun outp->dp.sink_count = ret;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun mutex_unlock(&outp->dp.hpd_irq_lock);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (send_hpd)
219*4882a593Smuzhiyun nouveau_connector_hpd(connector);
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* TODO:
223*4882a593Smuzhiyun * - Use the minimum possible BPC here, once we add support for the max bpc
224*4882a593Smuzhiyun * property.
225*4882a593Smuzhiyun * - Validate against the DP caps advertised by the GPU (we don't check these
226*4882a593Smuzhiyun * yet)
227*4882a593Smuzhiyun */
228*4882a593Smuzhiyun enum drm_mode_status
nv50_dp_mode_valid(struct drm_connector * connector,struct nouveau_encoder * outp,const struct drm_display_mode * mode,unsigned * out_clock)229*4882a593Smuzhiyun nv50_dp_mode_valid(struct drm_connector *connector,
230*4882a593Smuzhiyun struct nouveau_encoder *outp,
231*4882a593Smuzhiyun const struct drm_display_mode *mode,
232*4882a593Smuzhiyun unsigned *out_clock)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun const unsigned int min_clock = 25000;
235*4882a593Smuzhiyun unsigned int max_rate, mode_rate, ds_max_dotclock, clock = mode->clock;
236*4882a593Smuzhiyun const u8 bpp = connector->display_info.bpc * 3;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun if (mode->flags & DRM_MODE_FLAG_INTERLACE && !outp->caps.dp_interlace)
239*4882a593Smuzhiyun return MODE_NO_INTERLACE;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
242*4882a593Smuzhiyun clock *= 2;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun max_rate = outp->dp.link_nr * outp->dp.link_bw;
245*4882a593Smuzhiyun mode_rate = DIV_ROUND_UP(clock * bpp, 8);
246*4882a593Smuzhiyun if (mode_rate > max_rate)
247*4882a593Smuzhiyun return MODE_CLOCK_HIGH;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun ds_max_dotclock = drm_dp_downstream_max_dotclock(outp->dp.dpcd, outp->dp.downstream_ports);
250*4882a593Smuzhiyun if (ds_max_dotclock && clock > ds_max_dotclock)
251*4882a593Smuzhiyun return MODE_CLOCK_HIGH;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun if (clock < min_clock)
254*4882a593Smuzhiyun return MODE_CLOCK_LOW;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (out_clock)
257*4882a593Smuzhiyun *out_clock = clock;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun return MODE_OK;
260*4882a593Smuzhiyun }
261