Searched refs:SCLK_PCIEPHY_REF (Results 1 – 16 of 16) sorted by relevance
38 clocks = <&cru SCLK_PCIEPHY_REF>;40 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
31 clocks = <&cru SCLK_PCIEPHY_REF>;
112 #define SCLK_PCIEPHY_REF 111 macro
97 #define SCLK_PCIEPHY_REF 138 macro
98 #define SCLK_PCIEPHY_REF 138 macro
83 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
94 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
356 clocks = <&cru SCLK_PCIEPHY_REF>;358 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
502 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
714 clocks = <&cru SCLK_PCIEPHY_REF>;716 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
1643 clocks = <&cru SCLK_PCIEPHY_REF>;
469 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
1361 clocks = <&cru SCLK_PCIEPHY_REF>;
1128 COMPOSITE_NODIV(SCLK_PCIEPHY_REF, "clk_pciephy_ref", mux_pciephy_ref_p, CLK_SET_RATE_PARENT,
996 MUX(SCLK_PCIEPHY_REF, "clk_pciephy_ref", mux_pll_src_24m_pciephy_p, CLK_SET_RATE_PARENT,