1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ X11 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 8*4882a593Smuzhiyun#include "rk3399.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Theobroma Systems RK3399-Q7 SoM"; 12*4882a593Smuzhiyun compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun config { 15*4882a593Smuzhiyun u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ 16*4882a593Smuzhiyun u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ 17*4882a593Smuzhiyun u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ 18*4882a593Smuzhiyun u-boot,boot-led = "module_led"; 19*4882a593Smuzhiyun sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun chosen { 23*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 24*4882a593Smuzhiyun u-boot,spl-boot-order = \ 25*4882a593Smuzhiyun "same-as-spl", &spiflash, &sdhci, &sdmmc; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun aliases { 29*4882a593Smuzhiyun spi0 = &spi1; 30*4882a593Smuzhiyun spi1 = &spi5; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun leds { 34*4882a593Smuzhiyun compatible = "gpio-leds"; 35*4882a593Smuzhiyun pinctrl-names = "default"; 36*4882a593Smuzhiyun pinctrl-0 = <&leds_pins_puma>; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun module_led { 39*4882a593Smuzhiyun label = "module_led"; 40*4882a593Smuzhiyun gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; 41*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun sd_card_led { 45*4882a593Smuzhiyun label = "sd_card_led"; 46*4882a593Smuzhiyun gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; 47*4882a593Smuzhiyun linux,default-trigger = "mmc0"; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun clkin_gmac: external-gmac-clock { 52*4882a593Smuzhiyun compatible = "fixed-clock"; 53*4882a593Smuzhiyun clock-frequency = <125000000>; 54*4882a593Smuzhiyun clock-output-names = "clkin_gmac"; 55*4882a593Smuzhiyun #clock-cells = <0>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun dw_hdmi_audio: dw-hdmi-audio { 59*4882a593Smuzhiyun status = "enabled"; 60*4882a593Smuzhiyun compatible = "rockchip,dw-hdmi-audio"; 61*4882a593Smuzhiyun #sound-dai-cells = <0>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun hdmi_codec: hdmi-codec { 65*4882a593Smuzhiyun compatible = "simple-audio-card"; 66*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 67*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 68*4882a593Smuzhiyun simple-audio-card,name = "HDMI-CODEC"; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun simple-audio-card,cpu { 71*4882a593Smuzhiyun sound-dai = <&i2s2>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun simple-audio-card,codec { 75*4882a593Smuzhiyun sound-dai = <&hdmi>; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun hdmi_sound: hdmi-sound { 80*4882a593Smuzhiyun status = "disabled"; 81*4882a593Smuzhiyun compatible = "simple-audio-card"; 82*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 83*4882a593Smuzhiyun simple-audio-card,mclk-fs = <256>; 84*4882a593Smuzhiyun simple-audio-card,name = "rockchip,hdmi"; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun simple-audio-card,cpu { 87*4882a593Smuzhiyun sound-dai = <&i2s2>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun simple-audio-card,codec { 90*4882a593Smuzhiyun sound-dai = <&hdmi>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun usbhub_enable: usbhub_enable { 95*4882a593Smuzhiyun compatible = "regulator-fixed"; 96*4882a593Smuzhiyun regulator-name = "usbhub_enable"; 97*4882a593Smuzhiyun enable-active-low; 98*4882a593Smuzhiyun gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 99*4882a593Smuzhiyun regulator-boot-on; 100*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 101*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun /* 105*4882a593Smuzhiyun * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module 106*4882a593Smuzhiyun * eMMC and SPI flash powered-down initially (in fact it keeps the 107*4882a593Smuzhiyun * reset signal asserted). Even though it is an enable signal, we 108*4882a593Smuzhiyun * model this as a regulator. 109*4882a593Smuzhiyun */ 110*4882a593Smuzhiyun bios_enable: bios_enable { 111*4882a593Smuzhiyun compatible = "regulator-fixed"; 112*4882a593Smuzhiyun u-boot,dm-pre-reloc; 113*4882a593Smuzhiyun regulator-name = "bios_enable"; 114*4882a593Smuzhiyun enable-active-high; 115*4882a593Smuzhiyun gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; 116*4882a593Smuzhiyun regulator-always-on; 117*4882a593Smuzhiyun regulator-boot-on; 118*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 119*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun vccadc_ref: vccadc-ref { 123*4882a593Smuzhiyun compatible = "regulator-fixed"; 124*4882a593Smuzhiyun regulator-name = "vcc1v8_sys"; 125*4882a593Smuzhiyun regulator-always-on; 126*4882a593Smuzhiyun regulator-boot-on; 127*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 128*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 129*4882a593Smuzhiyun }; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun vcc3v3_sys: vcc3v3-sys { 132*4882a593Smuzhiyun compatible = "regulator-fixed"; 133*4882a593Smuzhiyun regulator-name = "vcc3v3_sys"; 134*4882a593Smuzhiyun regulator-always-on; 135*4882a593Smuzhiyun regulator-boot-on; 136*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 137*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun vcc5v0_otg: vcc5v0-otg-regulator { 141*4882a593Smuzhiyun compatible = "regulator-fixed"; 142*4882a593Smuzhiyun enable-active-high; 143*4882a593Smuzhiyun gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 144*4882a593Smuzhiyun pinctrl-names = "default"; 145*4882a593Smuzhiyun pinctrl-0 = <&otg_vbus_drv>; 146*4882a593Smuzhiyun regulator-name = "vcc5v0_otg"; 147*4882a593Smuzhiyun regulator-always-on; 148*4882a593Smuzhiyun }; 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun vcc5v0_host: vcc5v0-host-regulator { 151*4882a593Smuzhiyun compatible = "regulator-fixed"; 152*4882a593Smuzhiyun enable-active-low; 153*4882a593Smuzhiyun gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; 154*4882a593Smuzhiyun pinctrl-names = "default"; 155*4882a593Smuzhiyun pinctrl-0 = <&host_vbus_drv>; 156*4882a593Smuzhiyun regulator-name = "vcc5v0_host"; 157*4882a593Smuzhiyun regulator-always-on; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun vcc5v0_sys: vcc5v0-sys { 161*4882a593Smuzhiyun compatible = "regulator-fixed"; 162*4882a593Smuzhiyun regulator-name = "vcc5v0_sys"; 163*4882a593Smuzhiyun regulator-always-on; 164*4882a593Smuzhiyun regulator-boot-on; 165*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 166*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun vcc_phy: vcc-phy-regulator { 170*4882a593Smuzhiyun compatible = "regulator-fixed"; 171*4882a593Smuzhiyun regulator-name = "vcc_phy"; 172*4882a593Smuzhiyun regulator-always-on; 173*4882a593Smuzhiyun regulator-boot-on; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun vdd_log: vdd-log { 177*4882a593Smuzhiyun compatible = "pwm-regulator"; 178*4882a593Smuzhiyun pwms = <&pwm2 0 25000 1>; 179*4882a593Smuzhiyun regulator-name = "vdd_log"; 180*4882a593Smuzhiyun regulator-min-microvolt = <800000>; 181*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 182*4882a593Smuzhiyun regulator-always-on; 183*4882a593Smuzhiyun regulator-boot-on; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun /* for rockchip boot on */ 186*4882a593Smuzhiyun rockchip,pwm_id= <2>; 187*4882a593Smuzhiyun rockchip,pwm_voltage = <1000000>; 188*4882a593Smuzhiyun }; 189*4882a593Smuzhiyun}; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun&emmc_phy { 192*4882a593Smuzhiyun status = "okay"; 193*4882a593Smuzhiyun}; 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun&gmac { 196*4882a593Smuzhiyun phy-supply = <&vcc_phy>; 197*4882a593Smuzhiyun phy-mode = "rgmii"; 198*4882a593Smuzhiyun clock_in_out = "input"; 199*4882a593Smuzhiyun snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 200*4882a593Smuzhiyun snps,reset-active-low; 201*4882a593Smuzhiyun snps,reset-delays-us = <2 10000 50000>; 202*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_RMII_SRC>; 203*4882a593Smuzhiyun assigned-clock-parents = <&clkin_gmac>; 204*4882a593Smuzhiyun pinctrl-names = "default"; 205*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins>; 206*4882a593Smuzhiyun tx_delay = <0x10>; 207*4882a593Smuzhiyun rx_delay = <0x10>; 208*4882a593Smuzhiyun status = "okay"; 209*4882a593Smuzhiyun}; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun&hdmi { 212*4882a593Smuzhiyun #address-cells = <1>; 213*4882a593Smuzhiyun #size-cells = <0>; 214*4882a593Smuzhiyun #sound-dai-cells = <0>; 215*4882a593Smuzhiyun status = "okay"; 216*4882a593Smuzhiyun}; 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun&i2c0 { 219*4882a593Smuzhiyun status = "okay"; 220*4882a593Smuzhiyun i2c-scl-rising-time-ns = <168>; 221*4882a593Smuzhiyun i2c-scl-falling-time-ns = <4>; 222*4882a593Smuzhiyun clock-frequency = <400000>; 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun vdd_gpu: fan535555@60 { 225*4882a593Smuzhiyun compatible = "fcs,fan53555"; 226*4882a593Smuzhiyun reg = <0x60>; 227*4882a593Smuzhiyun vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 228*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 229*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 230*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 231*4882a593Smuzhiyun regulator-min-microvolt = <600000>; 232*4882a593Smuzhiyun regulator-max-microvolt = <1230000>; 233*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 234*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 235*4882a593Smuzhiyun regulator-always-on; 236*4882a593Smuzhiyun regulator-boot-on; 237*4882a593Smuzhiyun regulator-initial-state = <3>; 238*4882a593Smuzhiyun regulator-state-mem { 239*4882a593Smuzhiyun regulator-off-in-suspend; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun rk808: pmic@1b { 244*4882a593Smuzhiyun compatible = "rockchip,rk808"; 245*4882a593Smuzhiyun reg = <0x1b>; 246*4882a593Smuzhiyun interrupt-parent = <&gpio1>; 247*4882a593Smuzhiyun interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt? 248*4882a593Smuzhiyun pinctrl-names = "default"; 249*4882a593Smuzhiyun pinctrl-0 = <&pmic_int_l>; 250*4882a593Smuzhiyun rockchip,system-power-controller; 251*4882a593Smuzhiyun wakeup-source; 252*4882a593Smuzhiyun #clock-cells = <1>; 253*4882a593Smuzhiyun clock-output-names = "xin32k", "rk808-clkout2"; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun vcc1-supply = <&vcc5v0_sys>; 256*4882a593Smuzhiyun vcc2-supply = <&vcc5v0_sys>; 257*4882a593Smuzhiyun vcc3-supply = <&vcc5v0_sys>; 258*4882a593Smuzhiyun vcc4-supply = <&vcc5v0_sys>; 259*4882a593Smuzhiyun vcc6-supply = <&vcc5v0_sys>; 260*4882a593Smuzhiyun vcc7-supply = <&vcc5v0_sys>; 261*4882a593Smuzhiyun vcc8-supply = <&vcc3v3_sys>; 262*4882a593Smuzhiyun vcc9-supply = <&vcc5v0_sys>; 263*4882a593Smuzhiyun vcc10-supply = <&vcc5v0_sys>; 264*4882a593Smuzhiyun vcc11-supply = <&vcc5v0_sys>; 265*4882a593Smuzhiyun vcc12-supply = <&vcc3v3_sys>; 266*4882a593Smuzhiyun vddio-supply = <&vcc1v8_pmu>; 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun regulators { 269*4882a593Smuzhiyun vdd_center: DCDC_REG1 { 270*4882a593Smuzhiyun regulator-always-on; 271*4882a593Smuzhiyun regulator-boot-on; 272*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 273*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 274*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 275*4882a593Smuzhiyun regulator-name = "vdd_center"; 276*4882a593Smuzhiyun regulator-state-mem { 277*4882a593Smuzhiyun regulator-off-in-suspend; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun vdd_cpu_l: DCDC_REG2 { 282*4882a593Smuzhiyun regulator-always-on; 283*4882a593Smuzhiyun regulator-boot-on; 284*4882a593Smuzhiyun regulator-min-microvolt = <750000>; 285*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 286*4882a593Smuzhiyun regulator-ramp-delay = <6001>; 287*4882a593Smuzhiyun regulator-name = "vdd_cpu_l"; 288*4882a593Smuzhiyun regulator-state-mem { 289*4882a593Smuzhiyun regulator-off-in-suspend; 290*4882a593Smuzhiyun }; 291*4882a593Smuzhiyun }; 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun vcc_ddr: DCDC_REG3 { 294*4882a593Smuzhiyun regulator-always-on; 295*4882a593Smuzhiyun regulator-boot-on; 296*4882a593Smuzhiyun regulator-name = "vcc_ddr"; 297*4882a593Smuzhiyun regulator-state-mem { 298*4882a593Smuzhiyun regulator-on-in-suspend; 299*4882a593Smuzhiyun }; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun vcc_1v8: DCDC_REG4 { 303*4882a593Smuzhiyun regulator-always-on; 304*4882a593Smuzhiyun regulator-boot-on; 305*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 306*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 307*4882a593Smuzhiyun regulator-name = "vcc_1v8"; 308*4882a593Smuzhiyun regulator-state-mem { 309*4882a593Smuzhiyun regulator-on-in-suspend; 310*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun vcc_ldo1: LDO_REG1 { 315*4882a593Smuzhiyun regulator-boot-on; 316*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 317*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 318*4882a593Smuzhiyun regulator-name = "vcc_ldo1"; 319*4882a593Smuzhiyun regulator-state-mem { 320*4882a593Smuzhiyun regulator-off-in-suspend; 321*4882a593Smuzhiyun }; 322*4882a593Smuzhiyun }; 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun vcc1v8_hdmi: LDO_REG2 { 325*4882a593Smuzhiyun regulator-always-on; 326*4882a593Smuzhiyun regulator-boot-on; 327*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 328*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 329*4882a593Smuzhiyun regulator-name = "vcc1v8_hdmi"; 330*4882a593Smuzhiyun regulator-state-mem { 331*4882a593Smuzhiyun regulator-off-in-suspend; 332*4882a593Smuzhiyun }; 333*4882a593Smuzhiyun }; 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun vcc1v8_pmu: LDO_REG3 { 336*4882a593Smuzhiyun regulator-always-on; 337*4882a593Smuzhiyun regulator-boot-on; 338*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 339*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 340*4882a593Smuzhiyun regulator-name = "vcc1v8_pmu"; 341*4882a593Smuzhiyun regulator-state-mem { 342*4882a593Smuzhiyun regulator-on-in-suspend; 343*4882a593Smuzhiyun regulator-suspend-microvolt = <1800000>; 344*4882a593Smuzhiyun }; 345*4882a593Smuzhiyun }; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun vcc_sd: LDO_REG4 { 348*4882a593Smuzhiyun regulator-always-on; 349*4882a593Smuzhiyun regulator-boot-on; 350*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 351*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 352*4882a593Smuzhiyun regulator-name = "vcc_sd"; 353*4882a593Smuzhiyun regulator-state-mem { 354*4882a593Smuzhiyun regulator-on-in-suspend; 355*4882a593Smuzhiyun regulator-suspend-microvolt = <3000000>; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun }; 358*4882a593Smuzhiyun 359*4882a593Smuzhiyun vcc_ldo5: LDO_REG5 { 360*4882a593Smuzhiyun regulator-boot-on; 361*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 362*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 363*4882a593Smuzhiyun regulator-name = "vcc_ldo5"; 364*4882a593Smuzhiyun regulator-state-mem { 365*4882a593Smuzhiyun regulator-off-in-suspend; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun }; 368*4882a593Smuzhiyun 369*4882a593Smuzhiyun vcc_ldo6: LDO_REG6 { 370*4882a593Smuzhiyun regulator-boot-on; 371*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 372*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 373*4882a593Smuzhiyun regulator-name = "vcc_ldo6"; 374*4882a593Smuzhiyun regulator-state-mem { 375*4882a593Smuzhiyun regulator-off-in-suspend; 376*4882a593Smuzhiyun }; 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun vcc0v9_hdmi: LDO_REG7 { 380*4882a593Smuzhiyun regulator-always-on; 381*4882a593Smuzhiyun regulator-boot-on; 382*4882a593Smuzhiyun regulator-min-microvolt = <900000>; 383*4882a593Smuzhiyun regulator-max-microvolt = <900000>; 384*4882a593Smuzhiyun regulator-name = "vcc0v9_hdmi"; 385*4882a593Smuzhiyun regulator-state-mem { 386*4882a593Smuzhiyun regulator-off-in-suspend; 387*4882a593Smuzhiyun }; 388*4882a593Smuzhiyun }; 389*4882a593Smuzhiyun 390*4882a593Smuzhiyun vcc_efuse: LDO_REG8 { 391*4882a593Smuzhiyun regulator-always-on; 392*4882a593Smuzhiyun regulator-boot-on; 393*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 394*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 395*4882a593Smuzhiyun regulator-name = "vcc_efuse"; 396*4882a593Smuzhiyun regulator-state-mem { 397*4882a593Smuzhiyun regulator-off-in-suspend; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun }; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun vcc3v3_s3: SWITCH_REG1 { 402*4882a593Smuzhiyun regulator-always-on; 403*4882a593Smuzhiyun regulator-boot-on; 404*4882a593Smuzhiyun regulator-name = "vcc3v3_s3"; 405*4882a593Smuzhiyun regulator-state-mem { 406*4882a593Smuzhiyun regulator-off-in-suspend; 407*4882a593Smuzhiyun }; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun vcc3v3_s0: SWITCH_REG2 { 411*4882a593Smuzhiyun regulator-always-on; 412*4882a593Smuzhiyun regulator-boot-on; 413*4882a593Smuzhiyun regulator-name = "vcc3v3_s0"; 414*4882a593Smuzhiyun regulator-state-mem { 415*4882a593Smuzhiyun regulator-off-in-suspend; 416*4882a593Smuzhiyun }; 417*4882a593Smuzhiyun }; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun }; 420*4882a593Smuzhiyun}; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun&i2c8 { 423*4882a593Smuzhiyun status = "okay"; 424*4882a593Smuzhiyun clock-frequency = <400000>; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun vdd_cpu_b: fan53555@60 { 427*4882a593Smuzhiyun compatible = "fcs,fan53555"; 428*4882a593Smuzhiyun reg = <0x60>; 429*4882a593Smuzhiyun vsel-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 430*4882a593Smuzhiyun vin-supply = <&vcc5v0_sys>; 431*4882a593Smuzhiyun regulator-compatible = "fan53555-reg"; 432*4882a593Smuzhiyun regulator-name = "vdd_cpu_b"; 433*4882a593Smuzhiyun regulator-min-microvolt = <600000>; 434*4882a593Smuzhiyun regulator-max-microvolt = <1230000>; 435*4882a593Smuzhiyun regulator-ramp-delay = <1000>; 436*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 437*4882a593Smuzhiyun regulator-always-on; 438*4882a593Smuzhiyun regulator-boot-on; 439*4882a593Smuzhiyun regulator-initial-state = <3>; 440*4882a593Smuzhiyun regulator-state-mem { 441*4882a593Smuzhiyun regulator-off-in-suspend; 442*4882a593Smuzhiyun }; 443*4882a593Smuzhiyun }; 444*4882a593Smuzhiyun}; 445*4882a593Smuzhiyun 446*4882a593Smuzhiyun&i2s0 { 447*4882a593Smuzhiyun status = "okay"; 448*4882a593Smuzhiyun rockchip,i2s-broken-burst-len; 449*4882a593Smuzhiyun rockchip,playback-channels = <8>; 450*4882a593Smuzhiyun rockchip,capture-channels = <8>; 451*4882a593Smuzhiyun #sound-dai-cells = <0>; 452*4882a593Smuzhiyun}; 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun&i2s2 { 455*4882a593Smuzhiyun #sound-dai-cells = <0>; 456*4882a593Smuzhiyun status = "okay"; 457*4882a593Smuzhiyun}; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun&io_domains { 460*4882a593Smuzhiyun status = "okay"; 461*4882a593Smuzhiyun 462*4882a593Smuzhiyun bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */ 463*4882a593Smuzhiyun audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */ 464*4882a593Smuzhiyun sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 465*4882a593Smuzhiyun gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */ 466*4882a593Smuzhiyun}; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun&pcie0 { 469*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_PCIEPHY_REF>; 470*4882a593Smuzhiyun assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; 471*4882a593Smuzhiyun assigned-clock-rates = <100000000>; 472*4882a593Smuzhiyun ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 473*4882a593Smuzhiyun num-lanes = <4>; 474*4882a593Smuzhiyun pinctrl-names = "default"; 475*4882a593Smuzhiyun pinctrl-0 = <&pcie_clkreqn>; 476*4882a593Smuzhiyun status = "okay"; 477*4882a593Smuzhiyun}; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun&pcie_phy { 480*4882a593Smuzhiyun status = "okay"; 481*4882a593Smuzhiyun}; 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun&pmu_io_domains { 484*4882a593Smuzhiyun status = "okay"; 485*4882a593Smuzhiyun pmu1830-supply = <&vcc_1v8>; 486*4882a593Smuzhiyun}; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun&pwm0 { 489*4882a593Smuzhiyun status = "okay"; 490*4882a593Smuzhiyun}; 491*4882a593Smuzhiyun 492*4882a593Smuzhiyun&pwm2 { 493*4882a593Smuzhiyun status = "okay"; 494*4882a593Smuzhiyun}; 495*4882a593Smuzhiyun 496*4882a593Smuzhiyun&sdhci { 497*4882a593Smuzhiyun bus-width = <8>; 498*4882a593Smuzhiyun mmc-hs400-1_8v; 499*4882a593Smuzhiyun supports-emmc; 500*4882a593Smuzhiyun non-removable; 501*4882a593Smuzhiyun keep-power-in-suspend; 502*4882a593Smuzhiyun mmc-hs400-enhanced-strobe; 503*4882a593Smuzhiyun status = "okay"; 504*4882a593Smuzhiyun}; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun&sdmmc { 507*4882a593Smuzhiyun u-boot,dm-pre-reloc; 508*4882a593Smuzhiyun clock-frequency = <150000000>; 509*4882a593Smuzhiyun clock-freq-min-max = <100000 150000000>; 510*4882a593Smuzhiyun supports-sd; 511*4882a593Smuzhiyun bus-width = <4>; 512*4882a593Smuzhiyun cap-mmc-highspeed; 513*4882a593Smuzhiyun cap-sd-highspeed; 514*4882a593Smuzhiyun disable-wp; 515*4882a593Smuzhiyun num-slots = <1>; 516*4882a593Smuzhiyun vqmmc-supply = <&vcc_sd>; 517*4882a593Smuzhiyun pinctrl-names = "default"; 518*4882a593Smuzhiyun pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 519*4882a593Smuzhiyun status = "okay"; 520*4882a593Smuzhiyun}; 521*4882a593Smuzhiyun 522*4882a593Smuzhiyun&tcphy0 { 523*4882a593Smuzhiyun status = "okay"; 524*4882a593Smuzhiyun}; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun&tcphy1 { 527*4882a593Smuzhiyun status = "okay"; 528*4882a593Smuzhiyun}; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun&uart2 { 531*4882a593Smuzhiyun status = "okay"; 532*4882a593Smuzhiyun}; 533*4882a593Smuzhiyun 534*4882a593Smuzhiyun&usb_host0_ehci { 535*4882a593Smuzhiyun status = "disabled"; 536*4882a593Smuzhiyun}; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun&usb_host0_ohci { 539*4882a593Smuzhiyun status = "disabled"; 540*4882a593Smuzhiyun}; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun&usbdrd3_0 { 543*4882a593Smuzhiyun status = "okay"; 544*4882a593Smuzhiyun}; 545*4882a593Smuzhiyun 546*4882a593Smuzhiyun&usbdrd3_1 { 547*4882a593Smuzhiyun status = "okay"; 548*4882a593Smuzhiyun}; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun&usbdrd_dwc3_0 { 551*4882a593Smuzhiyun status = "okay"; 552*4882a593Smuzhiyun}; 553*4882a593Smuzhiyun 554*4882a593Smuzhiyun&usbdrd_dwc3_1 { 555*4882a593Smuzhiyun status = "okay"; 556*4882a593Smuzhiyun}; 557*4882a593Smuzhiyun 558*4882a593Smuzhiyun&usb_host1_ehci { 559*4882a593Smuzhiyun status = "disabled"; 560*4882a593Smuzhiyun}; 561*4882a593Smuzhiyun 562*4882a593Smuzhiyun&usb_host1_ohci { 563*4882a593Smuzhiyun status = "disabled"; 564*4882a593Smuzhiyun}; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun&vopb { 567*4882a593Smuzhiyun status = "okay"; 568*4882a593Smuzhiyun}; 569*4882a593Smuzhiyun 570*4882a593Smuzhiyun&gpio1 { 571*4882a593Smuzhiyun u-boot,dm-pre-reloc; 572*4882a593Smuzhiyun}; 573*4882a593Smuzhiyun 574*4882a593Smuzhiyun&gpio3 { 575*4882a593Smuzhiyun u-boot,dm-pre-reloc; 576*4882a593Smuzhiyun}; 577*4882a593Smuzhiyun 578*4882a593Smuzhiyun&pinctrl { 579*4882a593Smuzhiyun /* Pins that are not explicitely used by any devices */ 580*4882a593Smuzhiyun pinctrl-names = "default"; 581*4882a593Smuzhiyun pinctrl-0 = <&puma_pin_hog>; 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun hog { 584*4882a593Smuzhiyun puma_pin_hog: puma_pin_hog { 585*4882a593Smuzhiyun rockchip,pins = 586*4882a593Smuzhiyun /* We need pull-ups on Q7 buttons */ 587*4882a593Smuzhiyun <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */ 588*4882a593Smuzhiyun <RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */ 589*4882a593Smuzhiyun <RK_GPIO0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */ 590*4882a593Smuzhiyun <RK_GPIO0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */ 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun }; 593*4882a593Smuzhiyun 594*4882a593Smuzhiyun pmic { 595*4882a593Smuzhiyun pmic_int_l: pmic-int-l { 596*4882a593Smuzhiyun rockchip,pins = 597*4882a593Smuzhiyun <RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 598*4882a593Smuzhiyun }; 599*4882a593Smuzhiyun }; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun leds_pins_puma: led_pins@0 { 602*4882a593Smuzhiyun rockchip,pins = 603*4882a593Smuzhiyun <RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, 604*4882a593Smuzhiyun <RK_GPIO1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 605*4882a593Smuzhiyun }; 606*4882a593Smuzhiyun 607*4882a593Smuzhiyun usb2 { 608*4882a593Smuzhiyun otg_vbus_drv: otg-vbus-drv { 609*4882a593Smuzhiyun rockchip,pins = 610*4882a593Smuzhiyun <RK_GPIO0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 611*4882a593Smuzhiyun }; 612*4882a593Smuzhiyun 613*4882a593Smuzhiyun host_vbus_drv: host-vbus-drv { 614*4882a593Smuzhiyun rockchip,pins = 615*4882a593Smuzhiyun <RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 616*4882a593Smuzhiyun }; 617*4882a593Smuzhiyun }; 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun i2c8 { 620*4882a593Smuzhiyun i2c8_xfer_a: i2c8-xfer { 621*4882a593Smuzhiyun rockchip,pins = 622*4882a593Smuzhiyun <RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>, 623*4882a593Smuzhiyun <RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>; 624*4882a593Smuzhiyun }; 625*4882a593Smuzhiyun }; 626*4882a593Smuzhiyun}; 627*4882a593Smuzhiyun 628*4882a593Smuzhiyun&i2c1 { 629*4882a593Smuzhiyun status = "okay"; 630*4882a593Smuzhiyun clock-frequency = <400000>; 631*4882a593Smuzhiyun}; 632*4882a593Smuzhiyun&i2c2 { 633*4882a593Smuzhiyun status = "okay"; 634*4882a593Smuzhiyun clock-frequency = <400000>; 635*4882a593Smuzhiyun}; 636*4882a593Smuzhiyun&i2c4 { 637*4882a593Smuzhiyun status = "okay"; 638*4882a593Smuzhiyun clock-frequency = <400000>; 639*4882a593Smuzhiyun}; 640*4882a593Smuzhiyun&i2c6 { 641*4882a593Smuzhiyun status = "okay"; 642*4882a593Smuzhiyun clock-frequency = <400000>; 643*4882a593Smuzhiyun}; 644*4882a593Smuzhiyun 645*4882a593Smuzhiyun&i2c6_xfer { 646*4882a593Smuzhiyun /* Enable pull-ups, the pins would float otherwise. */ 647*4882a593Smuzhiyun rockchip,pins = 648*4882a593Smuzhiyun <RK_GPIO2 RK_PB2 RK_FUNC_2 &pcfg_pull_up>, 649*4882a593Smuzhiyun <RK_GPIO2 RK_PB1 RK_FUNC_2 &pcfg_pull_up>; 650*4882a593Smuzhiyun}; 651*4882a593Smuzhiyun 652*4882a593Smuzhiyun&i2c7 { 653*4882a593Smuzhiyun status = "okay"; 654*4882a593Smuzhiyun clock-frequency = <400000>; 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun rtc_twi: rtc@6f { 657*4882a593Smuzhiyun compatible = "isil,isl1208"; 658*4882a593Smuzhiyun reg = <0x6f>; 659*4882a593Smuzhiyun }; 660*4882a593Smuzhiyun fan: fan@18 { 661*4882a593Smuzhiyun compatible = "ti,amc6821"; 662*4882a593Smuzhiyun reg = <0x18>; 663*4882a593Smuzhiyun cooling-min-state = <0>; 664*4882a593Smuzhiyun cooling-max-state = <9>; 665*4882a593Smuzhiyun #cooling-cells = <2>; 666*4882a593Smuzhiyun }; 667*4882a593Smuzhiyun}; 668*4882a593Smuzhiyun 669*4882a593Smuzhiyun&uart0 { 670*4882a593Smuzhiyun u-boot,dm-pre-reloc; 671*4882a593Smuzhiyun pinctrl-names = "default"; 672*4882a593Smuzhiyun pinctrl-0 = <&uart0_xfer &uart0_cts>; 673*4882a593Smuzhiyun status = "okay"; 674*4882a593Smuzhiyun}; 675*4882a593Smuzhiyun 676*4882a593Smuzhiyun 677*4882a593Smuzhiyun&spi1 { 678*4882a593Smuzhiyun u-boot,dm-pre-reloc; 679*4882a593Smuzhiyun 680*4882a593Smuzhiyun status = "okay"; 681*4882a593Smuzhiyun 682*4882a593Smuzhiyun #address-cells = <1>; 683*4882a593Smuzhiyun #size-cells = <0>; 684*4882a593Smuzhiyun 685*4882a593Smuzhiyun spiflash: w25q32dw@0 { 686*4882a593Smuzhiyun u-boot,dm-pre-reloc; 687*4882a593Smuzhiyun 688*4882a593Smuzhiyun compatible = "spi-flash"; 689*4882a593Smuzhiyun reg = <0>; 690*4882a593Smuzhiyun spi-max-frequency = <49500000>; 691*4882a593Smuzhiyun spi-cpol; 692*4882a593Smuzhiyun spi-cpha; 693*4882a593Smuzhiyun }; 694*4882a593Smuzhiyun}; 695*4882a593Smuzhiyun 696*4882a593Smuzhiyun&spi5 { 697*4882a593Smuzhiyun status = "okay"; 698*4882a593Smuzhiyun}; 699