xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593SmuzhiyunRockchip PCIE PHY
2*4882a593Smuzhiyun-----------------------
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunRequired properties:
5*4882a593Smuzhiyun - compatible: rockchip,rk3399-pcie-phy
6*4882a593Smuzhiyun - clocks: Must contain an entry in clock-names.
7*4882a593Smuzhiyun	See ../clocks/clock-bindings.txt for details.
8*4882a593Smuzhiyun - clock-names: Must be "refclk"
9*4882a593Smuzhiyun - resets: Must contain an entry in reset-names.
10*4882a593Smuzhiyun	See ../reset/reset.txt for details.
11*4882a593Smuzhiyun - reset-names: Must be "phy"
12*4882a593Smuzhiyun
13*4882a593SmuzhiyunRequired properties for legacy PHY mode (deprecated):
14*4882a593Smuzhiyun - #phy-cells: must be 0
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunRequired properties for per-lane PHY mode (preferred):
17*4882a593Smuzhiyun - #phy-cells: must be 1
18*4882a593Smuzhiyun
19*4882a593SmuzhiyunExample:
20*4882a593Smuzhiyun
21*4882a593Smuzhiyungrf: syscon@ff770000 {
22*4882a593Smuzhiyun	compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
23*4882a593Smuzhiyun	#address-cells = <1>;
24*4882a593Smuzhiyun	#size-cells = <1>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun	...
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	pcie_phy: pcie-phy {
29*4882a593Smuzhiyun		compatible = "rockchip,rk3399-pcie-phy";
30*4882a593Smuzhiyun		#phy-cells = <0>;
31*4882a593Smuzhiyun		clocks = <&cru SCLK_PCIEPHY_REF>;
32*4882a593Smuzhiyun		clock-names = "refclk";
33*4882a593Smuzhiyun		resets = <&cru SRST_PCIEPHY>;
34*4882a593Smuzhiyun		reset-names = "phy";
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun};
37