PIN_INPUT_PULLDOWN (reference) in projects: OK3568_Linux_fs

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Searched refs:PIN_INPUT_PULLDOWN (Results 1 – 25 of 110) sorted by relevance

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/OK3568_Linux_fs/u-boot/board/ti/dra7xx/
H A D	mux_data.h	32 {GPMC_A0, (M3 \| PIN_INPUT_PULLDOWN)}, /* gpmc_a0.vout3_d16 / 33 {GPMC_A1, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a1.vout3_d17 / 34 {GPMC_A2, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a2.vout3_d18 / 35 {GPMC_A3, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a3.vout3_d19 / 36 {GPMC_A4, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a4.vout3_d20 / 37 {GPMC_A5, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a5.vout3_d21 / 38 {GPMC_A6, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a6.vout3_d22 / 39 {GPMC_A7, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a7.vout3_d23 / 40 {GPMC_A8, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a8.vout3_hsync / 41 {GPMC_A9, (M3 \| PIN_INPUT_PULLDOWN)}, / gpmc_a9.vout3_vsync */ [all …]
/OK3568_Linux_fs/u-boot/board/ti/am57xx/
H A D	mux_data.h	32 {GPMC_A0, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, /* gpmc_a0.vin3a_d16 / 33 {GPMC_A1, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a1.vin3a_d17 / 34 {GPMC_A2, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a2.vin3a_d18 / 35 {GPMC_A3, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a3.vin3a_d19 / 36 {GPMC_A4, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a4.vin3a_d20 / 37 {GPMC_A5, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a5.vin3a_d21 / 38 {GPMC_A6, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a6.vin3a_d22 / 39 {GPMC_A7, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a7.vin3a_d23 / 40 {GPMC_A8, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a8.vin3a_hsync0 / 41 {GPMC_A9, (M2 \| PIN_INPUT_PULLDOWN \| MANUAL_MODE)}, / gpmc_a9.vin3a_vsync0 */ [all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A D	am335x-sancloud-bbe.dts	24 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl / 30 … AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxclk.rgmii1_rclk / 31 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd3.rgmii1_rd3 / 32 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd2.rgmii1_rd2 / 33 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd1.rgmii1_rd1 / 34 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd0.rgmii1_rd0 */ 41 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 42 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 43 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 44 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
H A D	am335x-lxm.dts	65 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_int / 66 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1) / rmii1_crs_dv / 67 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE1) / rmii1_rxer / 71 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE1) / rmii1_rd1 / 72 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE1) / rmii1_rd0 / 73 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0) 79 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE3) / rmii2_rd1 / 80 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE3) / rmii2_rd0 / 81 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE3) / rmii2_crs_dv / 82 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE3) / rmii2_rxer */ [all …]
H A D	am335x-evmsk.dts	240 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad8.lcd_data23 / 241 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad9.lcd_data22 / 242 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad10.lcd_data21 / 243 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad11.lcd_data20 / 244 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad12.lcd_data19 / 245 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad13.lcd_data18 / 246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad14.lcd_data17 / 247 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad15.lcd_data16 */ 264 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) 265 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
H A D	am437x-gp-evm.dts	198 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl / 204 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rmii1_rclk / 205 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd1.rgmii1_rxd3 / 206 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd0.rgmii1_rxd2 / 207 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd1.rgmii1_rxd1 / 208 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd0.rgmii1_rxd0 */ 215 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN \| MUX_MODE7) 216 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE7) 217 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 218 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
H A D	am437x-idk-evm.dts	191 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN \| MUX_MODE7) 192 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 205 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN \| MUX_MODE7) 206 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN \| MUX_MODE7) 224 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN \| MUX_MODE7) 225 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN \| MUX_MODE7) 226 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN \| MUX_MODE7) 227 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN \| MUX_MODE7) 228 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN \| MUX_MODE7) 229 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
H A D	am335x-baltos.dtsi	92 …AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1) /* mii1_crs.rmii1_crs_dv … 96 …AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 / 97 …AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE1) / mii1_rxd0.rmii1_rxd0 / 98 …AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0) / rmii1_ref_clk.rmii… 103 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a1.rgmii2_rctl / 109 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a7.rgmii2_rclk / 110 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a8.rgmii2_rd3 / 111 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a9.rgmii2_rd2 / 112 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a10.rgmii2_rd1 / 113 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2) / gpmc_a11.rgmii2_rd0 */ [all …]
H A D	am43x-epos-evm.dts	147 AM4372_IOPAD(0x850, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 148 AM4372_IOPAD(0x858, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 149 AM4372_IOPAD(0x860, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 150 AM4372_IOPAD(0x864, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 151 AM4372_IOPAD(0x868, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 152 AM4372_IOPAD(0x86c, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 154 AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 156 AM4372_IOPAD(0x920, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 157 AM4372_IOPAD(0x9e0, DS0_PIN_INPUT_PULLDOWN \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 159 AM4372_IOPAD(0xA38, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
H A D	am335x-shc.dts	375 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE0) 377 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE0) 380 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE0) 381 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE0) 383 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0) 384 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE0) 385 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE0) 386 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE0) 387 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE0) 394 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
H A D	am335x-chiliboard.dts	49 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1) 56 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0) 63 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) 64 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 65 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 66 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 67 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 68 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 69 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 70 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
H A D	omap3-igep0030-common.dtsi	47 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN \| MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 / 48 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN \| MUX_MODE3) / mcspi2_clk.hsusb2_data7 / 49 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN \| MUX_MODE3) / mcspi2_simo.hsusb2_data4 / 50 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN \| MUX_MODE3) / mcspi2_somi.hsusb2_data5 / 51 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN \| MUX_MODE3) / mcspi2_cs0.hsusb2_data6 / 52 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN \| MUX_MODE3) / mcspi2_cs1.hsusb2_data3 / 74 OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN \| MUX_MODE3) / etk_d12.hsusb2_dir / 75 OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN \| MUX_MODE3) / etk_d13.hsusb2_nxt / 76 OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN \| MUX_MODE3) / etk_d14.hsusb2_data0 / 77 OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN \| MUX_MODE3) / etk_d15.hsusb2_data1 */
H A D	am335x-cm-t335.dts	181 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) 193 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) 195 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) 197 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) 199 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) 201 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) 208 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 209 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 210 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 211 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
H A D	omap3-cm-t3x30.dtsi	36 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN \| MUX_MODE0) /* hsusb0_dir.hsusb0_dir / 37 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_nxt.hsusb0_nxt / 38 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data0.hsusb2_data0 / 39 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data1.hsusb0_data1 / 40 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data2.hsusb0_data2 / 41 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data7.hsusb0_data3 / 42 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data7.hsusb0_data4 / 43 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data7.hsusb0_data5 / 44 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data7.hsusb0_data6 / 45 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN \| MUX_MODE0) / hsusb0_data7.hsusb0_data7 */
H A D	am335x-wega.dtsi	29 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) 30 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) 31 AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0) 97 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a1.mii2_rxdv / 102 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE1) / gpmc_a6.mii2_txclk / 103 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE1) / gpmc_a7.mii2_rxclk / 104 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE1) / gpmc_a8.mii2_rxd3 / 105 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE1) / gpmc_a9.mii2_rxd2 / 106 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE1) / gpmc_a10.mii2_rxd1 / 107 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE1) / gpmc_a11.mii2_rxd0 */ [all …]
H A D	am437x-sk-evm.dts	300 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 301 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN \| MUX_MODE7) 302 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN \| MUX_MODE7) 303 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN \| MUX_MODE7) 304 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN \| MUX_MODE7) 305 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 306 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN \| MUX_MODE7) 307 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE7) 308 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN \| MUX_MODE7) 309 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
H A D	am335x-osd3358-sm-red.dts	91 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 / 97 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) / mii1_col.gpio3_0 / 303 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxdv.rgmii1_rctl */ 309 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) 310 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) 311 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) 312 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) 313 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) 320 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 321 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
H A D	am335x-sbc-t335.dts	111 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) 113 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) 115 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) 117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) 119 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) 121 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) 123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) 125 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) 142 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) 143 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
H A D	am335x-netcom-plus-2xx.dts	25 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) /* CTS / 28 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) / DSR / 29 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) / DCD / 30 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) / RI / 38 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) / CTS / 41 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) / DSR / 42 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) / DCD / 43 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) / RI */
H A D	am335x-evm.dts	172 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a9.gpio1_25 / 173 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_a10.gpio1_26 / 174 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_a11.gpio1_27 / 180 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) / spi0_sclk.gpio0_2 / 181 AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLDOWN, MUX_MODE7) / spi0_d0.gpio0_3 / 251 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxdv.rgmii1_rctl / 257 … AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxclk.rgmii1_rclk / 258 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd3.rgmii1_rd3 / 259 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd2.rgmii1_rd2 / 260 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) / mii1_rxd1.rgmii1_rd1 */ [all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A D	am335x-evmsk.dts	245 AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN \| MUX_MODE7) /* gpmc_ad8.lcd_data23 / 246 AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad9.lcd_data22 / 247 AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad10.lcd_data21 / 248 AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad11.lcd_data20 / 249 AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad12.lcd_data19 / 250 AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad13.lcd_data18 / 251 AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad14.lcd_data17 / 252 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN \| MUX_MODE7) / gpmc_ad15.lcd_data16 / 269 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN \| MUX_MODE7) / lcd_vsync.lcd_vsync / 270 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN \| MUX_MODE7) / lcd_hsync.lcd_hsync */ [all …]
H A D	am437x-idk-evm.dts	143 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN \| MUX_MODE7) 144 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 157 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN \| MUX_MODE7) 158 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN \| MUX_MODE7) 176 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN \| MUX_MODE7) 177 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN \| MUX_MODE7) 178 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN \| MUX_MODE7) 179 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN \| MUX_MODE7) 180 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN \| MUX_MODE7) 181 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
H A D	am335x-draco.dts	68 0x10c (PIN_INPUT_PULLDOWN \| MUX_MODE1) /* mii1_crs.rmii1_crs_dv / 72 0x13c (PIN_INPUT_PULLDOWN \| MUX_MODE1) / mii1_rxd1.mii1_rxd1 / 73 0x140 (PIN_INPUT_PULLDOWN \| MUX_MODE1) / mii1_rxd0.mii1_rxd0 / 74 0x144 (PIN_INPUT_PULLDOWN \| MUX_MODE0) / rmii1_refclk.rmii1_refclk */ 80 0x10c (PIN_INPUT_PULLDOWN \| MUX_MODE7) 81 0x114 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 82 0x124 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 83 0x128 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 84 0x13c (PIN_INPUT_PULLDOWN \| MUX_MODE7) 85 0x140 (PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
H A D	am437x-sk-evm.dts	`273 0x12c (PIN_INPUT_PULLDOWN \| MUX_MODE7) 274 0x114 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 275 0x128 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 276 0x124 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 277 0x120 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 278 0x11c (PIN_INPUT_PULLDOWN \| MUX_MODE7) 279 0x130 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 280 0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 281 0x140 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 282 0x13c (PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]`
H A D	am335x-pxm2.dtsi	385 0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE2) /* mii1_rxdv.rgmii1_rctl / 391 0x130 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxclk.rgmii1_rclk / 392 0x134 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd3.rgmii1_rd3 / 393 0x138 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd2.rgmii1_rd2 / 394 0x13c (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd1.rgmii1_rd1 / 395 0x140 (PIN_INPUT_PULLDOWN \| MUX_MODE2) / mii1_rxd0.rgmii1_rd0 */ 402 0x114 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 403 0x118 (PIN_INPUT_PULLDOWN \| MUX_MODE7) 404 0x11c (PIN_INPUT_PULLDOWN \| MUX_MODE7) 405 0x120 (PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]

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