xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/am335x-chiliboard.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
4*4882a593Smuzhiyun * Author: Rostislav Lisovy <lisovy@jablotron.cz>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "am335x-chilisom.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "AM335x Chiliboard";
11*4882a593Smuzhiyun	compatible = "grinn,am335x-chiliboard", "grinn,am335x-chilisom",
12*4882a593Smuzhiyun		     "ti,am33xx";
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun	chosen {
15*4882a593Smuzhiyun		stdout-path = &uart0;
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	leds {
19*4882a593Smuzhiyun		compatible = "gpio-leds";
20*4882a593Smuzhiyun		pinctrl-names = "default";
21*4882a593Smuzhiyun		pinctrl-0 = <&led_gpio_pins>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		led0 {
24*4882a593Smuzhiyun			label = "led0";
25*4882a593Smuzhiyun			gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
26*4882a593Smuzhiyun			default-state = "keep";
27*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		led1 {
31*4882a593Smuzhiyun			label = "led1";
32*4882a593Smuzhiyun			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
33*4882a593Smuzhiyun			default-state = "keep";
34*4882a593Smuzhiyun		};
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&am33xx_pinmux {
39*4882a593Smuzhiyun	uart0_pins: pinmux_uart0_pins {
40*4882a593Smuzhiyun		pinctrl-single,pins = <
41*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
42*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
43*4882a593Smuzhiyun		>;
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	cpsw_default: cpsw_default {
47*4882a593Smuzhiyun		pinctrl-single,pins = <
48*4882a593Smuzhiyun			/* Slave 1 */
49*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
50*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)
51*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
52*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
53*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
54*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
55*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
56*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
57*4882a593Smuzhiyun		>;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	cpsw_sleep: cpsw_sleep {
61*4882a593Smuzhiyun		pinctrl-single,pins = <
62*4882a593Smuzhiyun			/* Slave 1 reset value */
63*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
64*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
65*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
66*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
67*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
68*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
69*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
70*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
71*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
72*4882a593Smuzhiyun		>;
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	davinci_mdio_default: davinci_mdio_default {
76*4882a593Smuzhiyun		pinctrl-single,pins = <
77*4882a593Smuzhiyun			/* mdio_data.mdio_data */
78*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
79*4882a593Smuzhiyun			/* mdio_clk.mdio_clk */
80*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
81*4882a593Smuzhiyun		>;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	davinci_mdio_sleep: davinci_mdio_sleep {
85*4882a593Smuzhiyun		pinctrl-single,pins = <
86*4882a593Smuzhiyun			/* MDIO reset value */
87*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
88*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
89*4882a593Smuzhiyun		>;
90*4882a593Smuzhiyun	};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun	usb1_drvvbus: usb1_drvvbus {
93*4882a593Smuzhiyun		pinctrl-single,pins = <
94*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
95*4882a593Smuzhiyun		>;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	sd_pins: pinmux_sd_card {
99*4882a593Smuzhiyun		pinctrl-single,pins = <
100*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT, MUX_MODE0)
101*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT, MUX_MODE0)
102*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT, MUX_MODE0)
103*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT, MUX_MODE0)
104*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT, MUX_MODE0)
105*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT, MUX_MODE0)
106*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spi0_cs1.gpio0_6 */
107*4882a593Smuzhiyun		>;
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun	led_gpio_pins: led_gpio_pins {
111*4882a593Smuzhiyun		pinctrl-single,pins = <
112*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_OUTPUT, MUX_MODE7) /* emu0.gpio3_7 */
113*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_OUTPUT, MUX_MODE7) /* emu1.gpio3_8 */
114*4882a593Smuzhiyun		>;
115*4882a593Smuzhiyun	};
116*4882a593Smuzhiyun};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun&uart0 {
119*4882a593Smuzhiyun	pinctrl-names = "default";
120*4882a593Smuzhiyun	pinctrl-0 = <&uart0_pins>;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	status = "okay";
123*4882a593Smuzhiyun};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&ldo4_reg {
126*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
127*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun/* Ethernet */
131*4882a593Smuzhiyun&mac {
132*4882a593Smuzhiyun	slaves = <1>;
133*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
134*4882a593Smuzhiyun	pinctrl-0 = <&cpsw_default>;
135*4882a593Smuzhiyun	pinctrl-1 = <&cpsw_sleep>;
136*4882a593Smuzhiyun	status = "okay";
137*4882a593Smuzhiyun};
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun&davinci_mdio {
140*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
141*4882a593Smuzhiyun	pinctrl-0 = <&davinci_mdio_default>;
142*4882a593Smuzhiyun	pinctrl-1 = <&davinci_mdio_sleep>;
143*4882a593Smuzhiyun	status = "okay";
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun	ethphy0: ethernet-phy@0 {
146*4882a593Smuzhiyun		reg = <0>;
147*4882a593Smuzhiyun	};
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&cpsw_emac0 {
151*4882a593Smuzhiyun	phy-handle = <&ethphy0>;
152*4882a593Smuzhiyun	phy-mode = "rmii";
153*4882a593Smuzhiyun};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun/* USB */
156*4882a593Smuzhiyun&usb1 {
157*4882a593Smuzhiyun	pinctrl-names = "default";
158*4882a593Smuzhiyun	pinctrl-0 = <&usb1_drvvbus>;
159*4882a593Smuzhiyun	dr_mode = "host";
160*4882a593Smuzhiyun};
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun/* microSD */
163*4882a593Smuzhiyun&mmc1 {
164*4882a593Smuzhiyun	pinctrl-names = "default";
165*4882a593Smuzhiyun	pinctrl-0 = <&sd_pins>;
166*4882a593Smuzhiyun	vmmc-supply = <&ldo4_reg>;
167*4882a593Smuzhiyun	bus-width = <0x4>;
168*4882a593Smuzhiyun	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
169*4882a593Smuzhiyun	status = "okay";
170*4882a593Smuzhiyun};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun&tps {
173*4882a593Smuzhiyun	interrupt-parent = <&intc>;
174*4882a593Smuzhiyun	interrupts = <7>; /* NNMI */
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun	charger {
177*4882a593Smuzhiyun		status = "okay";
178*4882a593Smuzhiyun	};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun	pwrbutton {
181*4882a593Smuzhiyun		status = "okay";
182*4882a593Smuzhiyun	};
183*4882a593Smuzhiyun};
184