xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/am335x-draco.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Support for Siemens DRACO board
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2014 - Lukas Stockmann <lukas.stockmann@siemens.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
7*4882a593Smuzhiyun * version 2.  This program is licensed "as is" without any warranty of any
8*4882a593Smuzhiyun * kind, whether express or implied.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/dts-v1/;
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun#include "am33xx.dtsi"
14*4882a593Smuzhiyun#include "am335x-draco.dtsi"
15*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun/ {
18*4882a593Smuzhiyun	model = "Siemens DRACO";
19*4882a593Smuzhiyun	compatible = "siemens,draco", "ti,am33xx";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	/* ethernet alias is needed for the MAC address passing from U-Boot */
22*4882a593Smuzhiyun	aliases {
23*4882a593Smuzhiyun		ethernet0 = &cpsw_emac0;
24*4882a593Smuzhiyun		mdio-gpio0 = &mdio0;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	gpio-keys {
28*4882a593Smuzhiyun		compatible = "gpio-keys";
29*4882a593Smuzhiyun		button0 {
30*4882a593Smuzhiyun			label = "button0";
31*4882a593Smuzhiyun			gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
32*4882a593Smuzhiyun			linux,code = <KEY_F1>; /* button0 */
33*4882a593Smuzhiyun		};
34*4882a593Smuzhiyun		button1 {
35*4882a593Smuzhiyun			label = "button1";
36*4882a593Smuzhiyun			gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
37*4882a593Smuzhiyun			linux,code = <KEY_F2>; /* button1 */
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	ocp {
42*4882a593Smuzhiyun		debugss: debugss@4b000000 {
43*4882a593Smuzhiyun			compatible = "ti,debugss";
44*4882a593Smuzhiyun			ti,hwmods = "debugss";
45*4882a593Smuzhiyun			reg = <0x4b000000 1000000>;
46*4882a593Smuzhiyun			status = "disabled";
47*4882a593Smuzhiyun		};
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun&am33xx_pinmux {
52*4882a593Smuzhiyun	pinctrl-names = "default";
53*4882a593Smuzhiyun	pinctrl-0 = <&gpio_mux_pins>;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	gpio_mux_pins: gpio_mux_pins {
56*4882a593Smuzhiyun		pinctrl-single,pins = <
57*4882a593Smuzhiyun			0x1d0 (PIN_INPUT | MUX_MODE0)	/* tms jtag */
58*4882a593Smuzhiyun			0x1d4 (PIN_INPUT | MUX_MODE0)	/* tdi jtag */
59*4882a593Smuzhiyun			0x1d8 (PIN_OUTPUT | MUX_MODE0)	/* tdo jtag */
60*4882a593Smuzhiyun			0x1dc (PIN_INPUT | MUX_MODE0)	/* tck jtag */
61*4882a593Smuzhiyun			0x1e0 (PIN_INPUT | MUX_MODE0)	/* trstn jtag */
62*4882a593Smuzhiyun		>;
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	cpsw_default: cpsw_default {
66*4882a593Smuzhiyun		pinctrl-single,pins = <
67*4882a593Smuzhiyun			0x0E8 (PIN_INPUT_PULLUP | MUX_MODE7)	/* lcd_plck FIX STO should be a OUTPUT driven high*/
68*4882a593Smuzhiyun			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_crs.rmii1_crs_dv */
69*4882a593Smuzhiyun			0x114 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txen.mii1_txen */
70*4882a593Smuzhiyun			0x124 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txd1.mii1_txd1 */
71*4882a593Smuzhiyun			0x128 (PIN_OUTPUT | MUX_MODE1)		/* mii1_txd0.mii1_txd0 */
72*4882a593Smuzhiyun			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd1.mii1_rxd1 */
73*4882a593Smuzhiyun			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)	/* mii1_rxd0.mii1_rxd0 */
74*4882a593Smuzhiyun			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)	/* rmii1_refclk.rmii1_refclk */
75*4882a593Smuzhiyun		>;
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	cpsw_sleep: cpsw_sleep {
79*4882a593Smuzhiyun		pinctrl-single,pins = <
80*4882a593Smuzhiyun			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
81*4882a593Smuzhiyun			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
82*4882a593Smuzhiyun			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
83*4882a593Smuzhiyun			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
84*4882a593Smuzhiyun			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
85*4882a593Smuzhiyun			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
86*4882a593Smuzhiyun			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
87*4882a593Smuzhiyun		>;
88*4882a593Smuzhiyun	};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun	davinci_mdio_default: davinci_mdio_default {
91*4882a593Smuzhiyun		pinctrl-single,pins = <
92*4882a593Smuzhiyun			/* MDIO */
93*4882a593Smuzhiyun			0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
94*4882a593Smuzhiyun			0x14c (PIN_OUTPUT | MUX_MODE0)			/* mdio_clk.mdio_clk */
95*4882a593Smuzhiyun		>;
96*4882a593Smuzhiyun	};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun	davinci_mdio_sleep: davinci_mdio_sleep {
99*4882a593Smuzhiyun		pinctrl-single,pins = <
100*4882a593Smuzhiyun			/* MDIO reset value */
101*4882a593Smuzhiyun			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
102*4882a593Smuzhiyun			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
103*4882a593Smuzhiyun		>;
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun	gpio_mdio_default: gpio_mdio_default {
107*4882a593Smuzhiyun		pinctrl-single,pins = <
108*4882a593Smuzhiyun			/* MDIO via GPIO */
109*4882a593Smuzhiyun			0x148 (PIN_INPUT | MUX_MODE7)	/* mdio_data.mdio_data GPIO0_0 */
110*4882a593Smuzhiyun			0x14c (PIN_OUTPUT | MUX_MODE7)	/* mdio_clk.mdio_clk GPIO0_1 */
111*4882a593Smuzhiyun		>;
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun&mac {
116*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
117*4882a593Smuzhiyun	pinctrl-0 = <&cpsw_default>;
118*4882a593Smuzhiyun	pinctrl-1 = <&cpsw_sleep>;
119*4882a593Smuzhiyun	slaves = <1>;			/* use only one emac if */
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun	mdio0: gpio {
122*4882a593Smuzhiyun		compatible = "virtual,mdio-gpio";
123*4882a593Smuzhiyun		pinctrl-names = "default";
124*4882a593Smuzhiyun		pinctrl-0 = <&gpio_mdio_default>;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun		#address-cells = <1>;
127*4882a593Smuzhiyun		#size-cells = <0>;
128*4882a593Smuzhiyun		gpios = <&gpio0 1 GPIO_ACTIVE_HIGH	/* MDIO-CLK */
129*4882a593Smuzhiyun			 &gpio0 0 GPIO_ACTIVE_HIGH>;	/* MDIO-DATA */
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		phy0: ethernet-phy@1 {
132*4882a593Smuzhiyun			reg = <0>;
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun/* Disable davinci/am335x mdio interface on this platform */
138*4882a593Smuzhiyun&davinci_mdio {
139*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
140*4882a593Smuzhiyun	pinctrl-0 = <&davinci_mdio_default>;
141*4882a593Smuzhiyun	pinctrl-1 = <&davinci_mdio_sleep>;
142*4882a593Smuzhiyun	status = "disabled";
143*4882a593Smuzhiyun};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun&cpsw_emac0 {
146*4882a593Smuzhiyun	phy_id = <&mdio0>, <0>;
147*4882a593Smuzhiyun	phy-mode = "rmii";
148*4882a593Smuzhiyun};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun&phy_sel {
151*4882a593Smuzhiyun	rmii-clock-ext;
152*4882a593Smuzhiyun};
153