1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Common support for CompuLab CM-T3x30 CoMs 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "omap3-cm-t3x.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun cpus { 10*4882a593Smuzhiyun cpu@0 { 11*4882a593Smuzhiyun cpu0-supply = <&vcc>; 12*4882a593Smuzhiyun }; 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun sound { 16*4882a593Smuzhiyun compatible = "ti,omap-twl4030"; 17*4882a593Smuzhiyun ti,model = "cm-t35"; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun ti,mcbsp = <&mcbsp2>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun}; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&omap3_pmx_core { 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun smsc1_pins: pinmux_smsc1_pins { 26*4882a593Smuzhiyun pinctrl-single,pins = < 27*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */ 28*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */ 29*4882a593Smuzhiyun >; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun hsusb0_pins: pinmux_hsusb0_pins { 33*4882a593Smuzhiyun pinctrl-single,pins = < 34*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 35*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 36*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 37*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 38*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */ 39*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 40*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 41*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */ 42*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */ 43*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */ 44*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */ 45*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 46*4882a593Smuzhiyun >; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun#include "omap-gpmc-smsc911x.dtsi" 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&gpmc { 53*4882a593Smuzhiyun ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ 54*4882a593Smuzhiyun <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun smsc1: ethernet@gpmc { 57*4882a593Smuzhiyun compatible = "smsc,lan9221", "smsc,lan9115"; 58*4882a593Smuzhiyun pinctrl-names = "default"; 59*4882a593Smuzhiyun pinctrl-0 = <&smsc1_pins>; 60*4882a593Smuzhiyun interrupt-parent = <&gpio6>; 61*4882a593Smuzhiyun interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 62*4882a593Smuzhiyun reg = <5 0 0xff>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun}; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun&i2c1 { 67*4882a593Smuzhiyun twl: twl@48 { 68*4882a593Smuzhiyun reg = <0x48>; 69*4882a593Smuzhiyun interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 70*4882a593Smuzhiyun interrupt-parent = <&intc>; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun twl_audio: audio { 73*4882a593Smuzhiyun compatible = "ti,twl4030-audio"; 74*4882a593Smuzhiyun codec { 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun}; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun#include "twl4030.dtsi" 81*4882a593Smuzhiyun#include "twl4030_omap3.dtsi" 82*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun&venc { 85*4882a593Smuzhiyun vdda-supply = <&vdac>; 86*4882a593Smuzhiyun}; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun&mmc1 { 89*4882a593Smuzhiyun vmmc-supply = <&vmmc1>; 90*4882a593Smuzhiyun}; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun&twl_gpio { 93*4882a593Smuzhiyun ti,use-leds; 94*4882a593Smuzhiyun /* pullups: BIT(0) */ 95*4882a593Smuzhiyun ti,pullups = <0x000001>; 96*4882a593Smuzhiyun}; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun&twl_keypad { 99*4882a593Smuzhiyun linux,keymap = < 100*4882a593Smuzhiyun MATRIX_KEY(0x00, 0x01, KEY_A) 101*4882a593Smuzhiyun MATRIX_KEY(0x00, 0x02, KEY_B) 102*4882a593Smuzhiyun MATRIX_KEY(0x00, 0x03, KEY_LEFT) 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun MATRIX_KEY(0x01, 0x01, KEY_UP) 105*4882a593Smuzhiyun MATRIX_KEY(0x01, 0x02, KEY_ENTER) 106*4882a593Smuzhiyun MATRIX_KEY(0x01, 0x03, KEY_DOWN) 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun MATRIX_KEY(0x02, 0x01, KEY_RIGHT) 109*4882a593Smuzhiyun MATRIX_KEY(0x02, 0x02, KEY_C) 110*4882a593Smuzhiyun MATRIX_KEY(0x02, 0x03, KEY_D) 111*4882a593Smuzhiyun >; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&hsusb1_phy { 115*4882a593Smuzhiyun reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&hsusb2_phy { 119*4882a593Smuzhiyun reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun&usb_otg_hs { 123*4882a593Smuzhiyun pinctrl-names = "default"; 124*4882a593Smuzhiyun pinctrl-0 = <&hsusb0_pins>; 125*4882a593Smuzhiyun interface-type = <0>; 126*4882a593Smuzhiyun usb-phy = <&usb2_phy>; 127*4882a593Smuzhiyun phys = <&usb2_phy>; 128*4882a593Smuzhiyun phy-names = "usb2-phy"; 129*4882a593Smuzhiyun mode = <3>; 130*4882a593Smuzhiyun power = <50>; 131*4882a593Smuzhiyun}; 132