1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 5*4882a593Smuzhiyun * it under the terms of the GNU General Public License version 2 as 6*4882a593Smuzhiyun * published by the Free Software Foundation. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/dts-v1/; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun#include "am4372.dtsi" 12*4882a593Smuzhiyun#include <dt-bindings/pinctrl/am43xx.h> 13*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 14*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 15*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun/ { 18*4882a593Smuzhiyun model = "TI AM437x Industrial Development Kit"; 19*4882a593Smuzhiyun compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43"; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { 22*4882a593Smuzhiyun stdout-path = &uart0; 23*4882a593Smuzhiyun tick-timer = &timer2; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun v24_0d: fixed-regulator-v24_0d { 27*4882a593Smuzhiyun compatible = "regulator-fixed"; 28*4882a593Smuzhiyun regulator-name = "V24_0D"; 29*4882a593Smuzhiyun regulator-min-microvolt = <24000000>; 30*4882a593Smuzhiyun regulator-max-microvolt = <24000000>; 31*4882a593Smuzhiyun regulator-always-on; 32*4882a593Smuzhiyun regulator-boot-on; 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun v3_3d: fixed-regulator-v3_3d { 36*4882a593Smuzhiyun compatible = "regulator-fixed"; 37*4882a593Smuzhiyun regulator-name = "V3_3D"; 38*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 39*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 40*4882a593Smuzhiyun regulator-always-on; 41*4882a593Smuzhiyun regulator-boot-on; 42*4882a593Smuzhiyun vin-supply = <&v24_0d>; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun vdd_corereg: fixed-regulator-vdd_corereg { 46*4882a593Smuzhiyun compatible = "regulator-fixed"; 47*4882a593Smuzhiyun regulator-name = "VDD_COREREG"; 48*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 49*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 50*4882a593Smuzhiyun regulator-always-on; 51*4882a593Smuzhiyun regulator-boot-on; 52*4882a593Smuzhiyun vin-supply = <&v24_0d>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun vdd_core: fixed-regulator-vdd_core { 56*4882a593Smuzhiyun compatible = "regulator-fixed"; 57*4882a593Smuzhiyun regulator-name = "VDD_CORE"; 58*4882a593Smuzhiyun regulator-min-microvolt = <1100000>; 59*4882a593Smuzhiyun regulator-max-microvolt = <1100000>; 60*4882a593Smuzhiyun regulator-always-on; 61*4882a593Smuzhiyun regulator-boot-on; 62*4882a593Smuzhiyun vin-supply = <&vdd_corereg>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun v1_8dreg: fixed-regulator-v1_8dreg{ 66*4882a593Smuzhiyun compatible = "regulator-fixed"; 67*4882a593Smuzhiyun regulator-name = "V1_8DREG"; 68*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 69*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 70*4882a593Smuzhiyun regulator-always-on; 71*4882a593Smuzhiyun regulator-boot-on; 72*4882a593Smuzhiyun vin-supply = <&v24_0d>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun v1_8d: fixed-regulator-v1_8d{ 76*4882a593Smuzhiyun compatible = "regulator-fixed"; 77*4882a593Smuzhiyun regulator-name = "V1_8D"; 78*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 79*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 80*4882a593Smuzhiyun regulator-always-on; 81*4882a593Smuzhiyun regulator-boot-on; 82*4882a593Smuzhiyun vin-supply = <&v1_8dreg>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun v1_5dreg: fixed-regulator-v1_5dreg{ 86*4882a593Smuzhiyun compatible = "regulator-fixed"; 87*4882a593Smuzhiyun regulator-name = "V1_5DREG"; 88*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 89*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 90*4882a593Smuzhiyun regulator-always-on; 91*4882a593Smuzhiyun regulator-boot-on; 92*4882a593Smuzhiyun vin-supply = <&v24_0d>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun v1_5d: fixed-regulator-v1_5d{ 96*4882a593Smuzhiyun compatible = "regulator-fixed"; 97*4882a593Smuzhiyun regulator-name = "V1_5D"; 98*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 99*4882a593Smuzhiyun regulator-max-microvolt = <1500000>; 100*4882a593Smuzhiyun regulator-always-on; 101*4882a593Smuzhiyun regulator-boot-on; 102*4882a593Smuzhiyun vin-supply = <&v1_5dreg>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun gpio_keys: gpio_keys { 106*4882a593Smuzhiyun compatible = "gpio-keys"; 107*4882a593Smuzhiyun pinctrl-names = "default"; 108*4882a593Smuzhiyun pinctrl-0 = <&gpio_keys_pins_default>; 109*4882a593Smuzhiyun #address-cells = <1>; 110*4882a593Smuzhiyun #size-cells = <0>; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun switch@0 { 113*4882a593Smuzhiyun label = "power-button"; 114*4882a593Smuzhiyun linux,code = <KEY_POWER>; 115*4882a593Smuzhiyun gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 116*4882a593Smuzhiyun }; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun /* fixed 32k external oscillator clock */ 120*4882a593Smuzhiyun clk_32k_rtc: clk_32k_rtc { 121*4882a593Smuzhiyun #clock-cells = <0>; 122*4882a593Smuzhiyun compatible = "fixed-clock"; 123*4882a593Smuzhiyun clock-frequency = <32768>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun}; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun&am43xx_pinmux { 128*4882a593Smuzhiyun gpio_keys_pins_default: gpio_keys_pins_default { 129*4882a593Smuzhiyun pinctrl-single,pins = < 130*4882a593Smuzhiyun AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */ 131*4882a593Smuzhiyun >; 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun i2c0_pins_default: i2c0_pins_default { 135*4882a593Smuzhiyun pinctrl-single,pins = < 136*4882a593Smuzhiyun AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 137*4882a593Smuzhiyun AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 138*4882a593Smuzhiyun >; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun i2c0_pins_sleep: i2c0_pins_sleep { 142*4882a593Smuzhiyun pinctrl-single,pins = < 143*4882a593Smuzhiyun AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7) 144*4882a593Smuzhiyun AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7) 145*4882a593Smuzhiyun >; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun i2c2_pins_default: i2c2_pins_default { 149*4882a593Smuzhiyun pinctrl-single,pins = < 150*4882a593Smuzhiyun AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ 151*4882a593Smuzhiyun AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ 152*4882a593Smuzhiyun >; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun i2c2_pins_sleep: i2c2_pins_sleep { 156*4882a593Smuzhiyun pinctrl-single,pins = < 157*4882a593Smuzhiyun AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7) 158*4882a593Smuzhiyun AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7) 159*4882a593Smuzhiyun >; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun mmc1_pins_default: pinmux_mmc1_pins_default { 163*4882a593Smuzhiyun pinctrl-single,pins = < 164*4882a593Smuzhiyun AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 165*4882a593Smuzhiyun AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 166*4882a593Smuzhiyun AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 167*4882a593Smuzhiyun AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 168*4882a593Smuzhiyun AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 169*4882a593Smuzhiyun AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 170*4882a593Smuzhiyun AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 171*4882a593Smuzhiyun >; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun mmc1_pins_sleep: pinmux_mmc1_pins_sleep { 175*4882a593Smuzhiyun pinctrl-single,pins = < 176*4882a593Smuzhiyun AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7) 177*4882a593Smuzhiyun AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7) 178*4882a593Smuzhiyun AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) 179*4882a593Smuzhiyun AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) 180*4882a593Smuzhiyun AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) 181*4882a593Smuzhiyun AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) 182*4882a593Smuzhiyun AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7) 183*4882a593Smuzhiyun >; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun ecap0_pins_default: backlight_pins_default { 187*4882a593Smuzhiyun pinctrl-single,pins = < 188*4882a593Smuzhiyun AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */ 189*4882a593Smuzhiyun >; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun cpsw_default: cpsw_default { 193*4882a593Smuzhiyun pinctrl-single,pins = < 194*4882a593Smuzhiyun AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ 195*4882a593Smuzhiyun AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 196*4882a593Smuzhiyun AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 197*4882a593Smuzhiyun AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 198*4882a593Smuzhiyun AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 199*4882a593Smuzhiyun AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 200*4882a593Smuzhiyun AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 201*4882a593Smuzhiyun AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 202*4882a593Smuzhiyun AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 203*4882a593Smuzhiyun AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 204*4882a593Smuzhiyun AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 205*4882a593Smuzhiyun AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 206*4882a593Smuzhiyun >; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun cpsw_sleep: cpsw_sleep { 210*4882a593Smuzhiyun pinctrl-single,pins = < 211*4882a593Smuzhiyun AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 212*4882a593Smuzhiyun AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 213*4882a593Smuzhiyun AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 214*4882a593Smuzhiyun AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 215*4882a593Smuzhiyun AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 216*4882a593Smuzhiyun AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 217*4882a593Smuzhiyun AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 218*4882a593Smuzhiyun AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 219*4882a593Smuzhiyun AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 220*4882a593Smuzhiyun AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 221*4882a593Smuzhiyun AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 222*4882a593Smuzhiyun AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 223*4882a593Smuzhiyun >; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun 226*4882a593Smuzhiyun davinci_mdio_default: davinci_mdio_default { 227*4882a593Smuzhiyun pinctrl-single,pins = < 228*4882a593Smuzhiyun /* MDIO */ 229*4882a593Smuzhiyun AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 230*4882a593Smuzhiyun AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 231*4882a593Smuzhiyun >; 232*4882a593Smuzhiyun }; 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun davinci_mdio_sleep: davinci_mdio_sleep { 235*4882a593Smuzhiyun pinctrl-single,pins = < 236*4882a593Smuzhiyun /* MDIO reset value */ 237*4882a593Smuzhiyun AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 238*4882a593Smuzhiyun AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 239*4882a593Smuzhiyun >; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun qspi_pins_default: qspi_pins_default { 243*4882a593Smuzhiyun pinctrl-single,pins = < 244*4882a593Smuzhiyun AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 245*4882a593Smuzhiyun AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 246*4882a593Smuzhiyun AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 247*4882a593Smuzhiyun AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 248*4882a593Smuzhiyun AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 249*4882a593Smuzhiyun AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 250*4882a593Smuzhiyun >; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun qspi_pins_sleep: qspi_pins_sleep{ 254*4882a593Smuzhiyun pinctrl-single,pins = < 255*4882a593Smuzhiyun AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7) 256*4882a593Smuzhiyun AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) 257*4882a593Smuzhiyun AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) 258*4882a593Smuzhiyun AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) 259*4882a593Smuzhiyun AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7) 260*4882a593Smuzhiyun AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) 261*4882a593Smuzhiyun >; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun}; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun&i2c0 { 266*4882a593Smuzhiyun status = "okay"; 267*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 268*4882a593Smuzhiyun pinctrl-0 = <&i2c0_pins_default>; 269*4882a593Smuzhiyun pinctrl-1 = <&i2c0_pins_sleep>; 270*4882a593Smuzhiyun clock-frequency = <400000>; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun at24@50 { 273*4882a593Smuzhiyun compatible = "at24,24c256"; 274*4882a593Smuzhiyun pagesize = <64>; 275*4882a593Smuzhiyun reg = <0x50>; 276*4882a593Smuzhiyun }; 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun tps: tps62362@60 { 279*4882a593Smuzhiyun compatible = "ti,tps62362"; 280*4882a593Smuzhiyun reg = <0x60>; 281*4882a593Smuzhiyun regulator-name = "VDD_MPU"; 282*4882a593Smuzhiyun regulator-min-microvolt = <950000>; 283*4882a593Smuzhiyun regulator-max-microvolt = <1330000>; 284*4882a593Smuzhiyun regulator-boot-on; 285*4882a593Smuzhiyun regulator-always-on; 286*4882a593Smuzhiyun ti,vsel0-state-high; 287*4882a593Smuzhiyun ti,vsel1-state-high; 288*4882a593Smuzhiyun vin-supply = <&v3_3d>; 289*4882a593Smuzhiyun }; 290*4882a593Smuzhiyun}; 291*4882a593Smuzhiyun 292*4882a593Smuzhiyun&i2c2 { 293*4882a593Smuzhiyun status = "okay"; 294*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 295*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins_default>; 296*4882a593Smuzhiyun pinctrl-1 = <&i2c2_pins_sleep>; 297*4882a593Smuzhiyun clock-frequency = <100000>; 298*4882a593Smuzhiyun}; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun&epwmss0 { 301*4882a593Smuzhiyun status = "okay"; 302*4882a593Smuzhiyun}; 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun&ecap0 { 305*4882a593Smuzhiyun status = "okay"; 306*4882a593Smuzhiyun pinctrl-names = "default"; 307*4882a593Smuzhiyun pinctrl-0 = <&ecap0_pins_default>; 308*4882a593Smuzhiyun}; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun&gpio0 { 311*4882a593Smuzhiyun status = "okay"; 312*4882a593Smuzhiyun}; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun&gpio1 { 315*4882a593Smuzhiyun status = "okay"; 316*4882a593Smuzhiyun}; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun&gpio4 { 319*4882a593Smuzhiyun status = "okay"; 320*4882a593Smuzhiyun}; 321*4882a593Smuzhiyun 322*4882a593Smuzhiyun&gpio5 { 323*4882a593Smuzhiyun status = "okay"; 324*4882a593Smuzhiyun}; 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun&mmc1 { 327*4882a593Smuzhiyun status = "okay"; 328*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 329*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins_default>; 330*4882a593Smuzhiyun pinctrl-1 = <&mmc1_pins_sleep>; 331*4882a593Smuzhiyun vmmc-supply = <&v3_3d>; 332*4882a593Smuzhiyun bus-width = <4>; 333*4882a593Smuzhiyun cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 334*4882a593Smuzhiyun}; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun&qspi { 337*4882a593Smuzhiyun status = "okay"; 338*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 339*4882a593Smuzhiyun pinctrl-0 = <&qspi_pins_default>; 340*4882a593Smuzhiyun pinctrl-1 = <&qspi_pins_sleep>; 341*4882a593Smuzhiyun 342*4882a593Smuzhiyun spi-max-frequency = <48000000>; 343*4882a593Smuzhiyun m25p80@0 { 344*4882a593Smuzhiyun compatible = "mx66l51235l", "spi-flash"; 345*4882a593Smuzhiyun spi-max-frequency = <48000000>; 346*4882a593Smuzhiyun reg = <0>; 347*4882a593Smuzhiyun spi-cpol; 348*4882a593Smuzhiyun spi-cpha; 349*4882a593Smuzhiyun spi-tx-bus-width = <1>; 350*4882a593Smuzhiyun spi-rx-bus-width = <4>; 351*4882a593Smuzhiyun #address-cells = <1>; 352*4882a593Smuzhiyun #size-cells = <1>; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun /* 355*4882a593Smuzhiyun * MTD partition table. The ROM checks the first 512KiB for a 356*4882a593Smuzhiyun * valid file to boot(XIP). 357*4882a593Smuzhiyun */ 358*4882a593Smuzhiyun partition@0 { 359*4882a593Smuzhiyun label = "QSPI.U_BOOT"; 360*4882a593Smuzhiyun reg = <0x00000000 0x000080000>; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun partition@1 { 363*4882a593Smuzhiyun label = "QSPI.U_BOOT.backup"; 364*4882a593Smuzhiyun reg = <0x00080000 0x00080000>; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun partition@2 { 367*4882a593Smuzhiyun label = "QSPI.U-BOOT-SPL_OS"; 368*4882a593Smuzhiyun reg = <0x00100000 0x00010000>; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun partition@3 { 371*4882a593Smuzhiyun label = "QSPI.U_BOOT_ENV"; 372*4882a593Smuzhiyun reg = <0x00110000 0x00010000>; 373*4882a593Smuzhiyun }; 374*4882a593Smuzhiyun partition@4 { 375*4882a593Smuzhiyun label = "QSPI.U-BOOT-ENV.backup"; 376*4882a593Smuzhiyun reg = <0x00120000 0x00010000>; 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun partition@5 { 379*4882a593Smuzhiyun label = "QSPI.KERNEL"; 380*4882a593Smuzhiyun reg = <0x00130000 0x0800000>; 381*4882a593Smuzhiyun }; 382*4882a593Smuzhiyun partition@6 { 383*4882a593Smuzhiyun label = "QSPI.FILESYSTEM"; 384*4882a593Smuzhiyun reg = <0x00930000 0x36D0000>; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun }; 387*4882a593Smuzhiyun}; 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun&mac { 390*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 391*4882a593Smuzhiyun pinctrl-0 = <&cpsw_default>; 392*4882a593Smuzhiyun pinctrl-1 = <&cpsw_sleep>; 393*4882a593Smuzhiyun status = "okay"; 394*4882a593Smuzhiyun}; 395*4882a593Smuzhiyun 396*4882a593Smuzhiyun&davinci_mdio { 397*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 398*4882a593Smuzhiyun pinctrl-0 = <&davinci_mdio_default>; 399*4882a593Smuzhiyun pinctrl-1 = <&davinci_mdio_sleep>; 400*4882a593Smuzhiyun status = "okay"; 401*4882a593Smuzhiyun}; 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun&cpsw_emac0 { 404*4882a593Smuzhiyun phy_id = <&davinci_mdio>, <0>; 405*4882a593Smuzhiyun phy-mode = "rgmii"; 406*4882a593Smuzhiyun}; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun&rtc { 409*4882a593Smuzhiyun clocks = <&clk_32k_rtc>, <&clk_32768_ck>; 410*4882a593Smuzhiyun clock-names = "ext-clk", "int-clk"; 411*4882a593Smuzhiyun status = "okay"; 412*4882a593Smuzhiyun}; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun&wdt { 415*4882a593Smuzhiyun status = "okay"; 416*4882a593Smuzhiyun}; 417*4882a593Smuzhiyun 418*4882a593Smuzhiyun&cpu { 419*4882a593Smuzhiyun cpu0-supply = <&tps>; 420*4882a593Smuzhiyun}; 421