| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | stm32fx-clock.h | 47 #define CLK_UART5 22 macro
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| H A D | rv1106-cru.h | 197 #define CLK_UART5 191 macro
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| H A D | rk3562-cru.h | 203 #define CLK_UART5 193 macro
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| H A D | rk3528-cru.h | 418 #define CLK_UART5 541 macro
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| H A D | rk3588-cru.h | 201 #define CLK_UART5 198 macro
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| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | stm32fx-clock.h | 48 #define CLK_UART5 22 macro
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| H A D | actions,s500-cmu.h | 63 #define CLK_UART5 43 macro
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| H A D | actions,s700-cmu.h | 63 #define CLK_UART5 41 macro
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| H A D | actions,s900-cmu.h | 90 #define CLK_UART5 72 macro
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| H A D | rv1106-cru.h | 196 #define CLK_UART5 191 macro
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| H A D | rk3562-cru.h | 203 #define CLK_UART5 193 macro
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| H A D | rk3528-cru.h | 411 #define CLK_UART5 541 macro
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| H A D | rk3588-cru.h | 201 #define CLK_UART5 198 macro
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | actions,owl-cmu.txt | 51 clocks = <&cmu CLK_UART5>;
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| H A D | st,stm32-rcc.txt | 98 22 CLK_UART5
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/actions/ |
| H A D | s700.dtsi | 159 clocks = <&cmu CLK_UART5>;
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| H A D | s900.dtsi | 165 clocks = <&cmu CLK_UART5>;
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| /OK3568_Linux_fs/kernel/drivers/clk/ |
| H A D | clk-stm32f4.c | 1325 CLK_UART5, "uart5",
1477 CLK_UART5, "uart5",
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| /OK3568_Linux_fs/kernel/drivers/clk/actions/ |
| H A D | owl-s500.c | 481 [CLK_UART5] = &uart5_clk.common.hw,
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| H A D | owl-s700.c | 531 [CLK_UART5] = &clk_uart5.common.hw,
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| H A D | owl-s900.c | 681 [CLK_UART5] = &uart5_clk.common.hw,
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | stm32f746.dtsi | 335 clocks = <&rcc 1 CLK_UART5>;
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| /OK3568_Linux_fs/kernel/drivers/clk/renesas/ |
| H A D | r9a06g032-clocks.c | 307 D_UGATE(CLK_UART5, "clk_uart5", UART_GROUP_34567, 1, 2, 0x768, 0x769, 0x76a, 0x76b),
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| /OK3568_Linux_fs/kernel/drivers/clk/rockchip/ |
| H A D | clk-rk3528.c | 221 MUX(CLK_UART5, "clk_uart5", sclk_uart5_src_p, CLK_SET_RATE_PARENT,
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| H A D | clk-rk3562.c | 181 MUX(CLK_UART5, "clk_uart5", clk_uart5_p, CLK_SET_RATE_PARENT,
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