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Searched refs:CLK_UART1 (Results 1 – 25 of 46) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/clk/zte/
H A Dclk-zx296702.c47 #define CLK_UART1 (lsp1crpm_base + 0x24) macro
699 ARRAY_SIZE(uart_wclk_sel), CLK_UART1, 4, 1); in zx296702_lsp1_clocks_init()
701 zx_gate("uart1_wclk", "uart1_wclk_mux", CLK_UART1, 1); in zx296702_lsp1_clocks_init()
703 zx_gate("uart1_pclk", "lsp1_apb_pclk", CLK_UART1, 0); in zx296702_lsp1_clocks_init()
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dexynos5410.h37 #define CLK_UART1 258 macro
H A Dactions,s500-cmu.h59 #define CLK_UART1 39 macro
H A Dactions,s700-cmu.h59 #define CLK_UART1 37 macro
H A Dactions,s900-cmu.h86 #define CLK_UART1 68 macro
H A Dpistachio-clk.h40 #define CLK_UART1 49 macro
H A Dexynos5250.h93 #define CLK_UART1 290 macro
H A Ds5pv210.h160 #define CLK_UART1 142 macro
H A Dexynos4.h151 #define CLK_UART1 313 macro
H A Dexynos5420.h67 #define CLK_UART1 258 macro
H A Dexynos3250.h221 #define CLK_UART1 215 macro
H A Dsprd,sc9860-clk.h86 #define CLK_UART1 3 macro
H A Drv1106-cru.h180 #define CLK_UART1 175 macro
H A Drk3562-cru.h187 #define CLK_UART1 177 macro
H A Drk3528-cru.h407 #define CLK_UART1 537 macro
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos5410.c198 GATE(CLK_UART1, "uart1", "aclk66", GATE_IP_PERIC, 1, 0, 0),
/OK3568_Linux_fs/kernel/drivers/clk/pistachio/
H A Dclk-pistachio.c36 GATE(CLK_UART1, "uart1", "uart1_div", 0x104, 17),
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drv1106-cru.h181 #define CLK_UART1 175 macro
H A Drk3562-cru.h187 #define CLK_UART1 177 macro
H A Drk3528-cru.h414 #define CLK_UART1 537 macro
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Ds5pv210.dtsi336 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
H A Dexynos5410.dtsi351 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/actions/
H A Ds700.dtsi127 clocks = <&cmu CLK_UART1>;
H A Ds900.dtsi133 clocks = <&cmu CLK_UART1>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi91 <&ap_clk CLK_UART1>, <&ext_26m>;

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