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Searched refs:CLK_TOP_SYSPLL3_D2 (Results 1 – 20 of 20) sorted by relevance

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Dspi-mt65xx.txt28 - <&topckgen CLK_TOP_SYSPLL3_D2>: specify parent clock 109MHZ.
59 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt7629-clk.h43 #define CLK_TOP_SYSPLL3_D2 33 macro
H A Dmt7622-clk.h37 #define CLK_TOP_SYSPLL3_D2 25 macro
H A Dmt6797-clk.h57 #define CLK_TOP_SYSPLL3_D2 47 macro
H A Dmt6765-clk.h46 #define CLK_TOP_SYSPLL3_D2 11 macro
H A Dmt8173-clk.h62 #define CLK_TOP_SYSPLL3_D2 52 macro
H A Dmt2712-clk.h45 #define CLK_TOP_SYSPLL3_D2 14 macro
H A Dmt2701-clk.h23 #define CLK_TOP_SYSPLL3_D2 13 macro
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dmt2701.dtsi343 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
403 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
416 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
H A Dmt7623.dtsi488 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
567 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
581 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
H A Dmt7629.dtsi282 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt7629.c411 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "mainpll", 1, 10),
H A Dclk-mt7622.c403 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "mainpll", 1, 10),
H A Dclk-mt6797.c38 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2),
H A Dclk-mt2701.c70 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2),
H A Dclk-mt8173.c95 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "main_h218p4m", 1, 2),
H A Dclk-mt6765.c93 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2),
H A Dclk-mt2712.c74 FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1,
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi491 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
573 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
H A Dmt8173.dtsi703 clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,