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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dlpc4357-myd-lpc4357.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
8 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "myir,myd-lpc4357", "nxp,lpc4357";
20 stdout-path = "serial3:115200n8";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
31 pinctrl-0 = <&led_pins>;
[all …]
H A Dstm32mp15-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_in6_pins_a: adc1-in6-0 {
15 adc12_ain_pins_a: adc12-ain-0 {
24 adc12_ain_pins_b: adc12-ain-1 {
31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
38 cec_pins_a: cec-0 {
41 bias-disable;
42 drive-open-drain;
[all …]
H A Dlpc4357-ea4357-devkit.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "regulator-fixed";
43 regulator-name = "3v3-supply";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
[all …]
H A Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
102 linux,default-trigger = "heartbeat";
[all …]
H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
12 pinctrl: pin-controller {
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
18 pins-are-numbered;
21 gpio-controller;
[all …]
H A Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
37 ps-clk-frequency = <33333333>;
42 phy-mode = "rgmii-id";
[all …]
H A Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
37 wakeup-source;
44 wakeup-source;
[all …]
H A Dstm32f4-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
48 pinctrl: pin-controller {
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
54 pins-are-numbered;
57 gpio-controller;
[all …]
H A Dlpc4337-ciaa.dts2 * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
4 * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
9 * Released under the terms of 3-clause BSD License
12 /dts-v1/;
17 #include "dt-bindings/gpio/gpio.h"
30 stdout-path = &uart2;
40 enet_rmii_pins: enet-rmii-pins {
44 slew-rate = <1>;
45 bias-disable;
46 input-enable;
[all …]
H A Dstm32h743-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 pin-controller {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "st,stm32h743-pinctrl";
52 interrupt-parent = <&exti>;
54 pins-are-numbered;
57 gpio-controller;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dbrcm,bcm11351-pinctrl.txt10 - compatible: Must be "brcm,bcm11351-pinctrl"
11 - reg: Base address of the PAD Controller register block and the size
17 compatible = "brcm,bcm11351-pinctrl";
27 Each pin configuration node is a sub-node of the pin controller node and is a
31 Please refer to the pinctrl-bindings.txt in this directory for details of the
45 details generic pin config properties, please refer to pinctrl-bindings.txt
46 and <include/linux/pinctrl/pinconfig-generic.h>.
54 - pins: Multiple strings. Specifies the name(s) of one or more pins to
59 - function: String. Specifies the pin mux selection. Values
61 - input-schmitt-enable: No arguments. Enable schmitt-trigger mode.
[all …]
H A Dnvidia,tegra20-pinmux.txt4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, tristate, drive strength, etc.
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
34 Optional subnode-properties:
35 - nvidia,function: A string containing the name of the function to mux to the
38 - nvidia,pull: Integer, representing the pull-down/up to apply to the pin.
[all …]
H A Dxlnx,zynq-pinctrl.txt4 - compatible: "xlnx,zynq-pinctrl"
5 - syscon: phandle to SLCR
6 - reg: Offset and length of pinctrl space in SLCR
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, slew rate, etc.
25 - groups: A list of pinmux groups.
26 - function: The name of a pinmux function to activate for the specified set
31 - pins: a list of pin names
32 - groups: A list of pinmux groups.
34 The following generic properties as defined in pinctrl-bindings.txt are valid
[all …]
H A Dpinctrl-mt6797.txt6 - compatible: Value should be one of the following.
7 "mediatek,mt6797-pinctrl", compatible with mt6797 pinctrl.
8 - reg: Should contain address and size for gpio, iocfgl, iocfgb,
10 - reg-names: An array of strings describing the "reg" entries. Must
12 - gpio-controller: Marks the device node as a gpio controller.
13 - #gpio-cells: Should be two. The first cell is the gpio pin number
17 - interrupt-controller: Marks the device node as an interrupt controller.
18 - #interrupt-cells: Should be two.
19 - interrupts : The interrupt outputs from the controller.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dstm32mp157-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
10 pinctrl: pin-controller@50002000 {
11 #address-cells = <1>;
12 #size-cells = <1>;
13 compatible = "st,stm32mp157-pinctrl";
15 interrupt-parent = <&exti>;
17 pins-are-numbered;
20 gpio-controller;
[all …]
H A Dzynq-zc702.dts4 * Copyright (C) 2011 - 2015 Xilinx
7 * SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
10 #include "zynq-7000.dtsi"
14 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
31 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
36 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
H A Dzynq-zc706.dts4 * Copyright (C) 2011 - 2015 Xilinx
7 * SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
10 #include "zynq-7000.dtsi"
14 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
31 stdout-path = "serial0:115200n8";
35 compatible = "usb-nop-xceiv";
36 #phy-cells = <0>;
41 ps-clk-frequency = <33333333>;
46 phy-mode = "rgmii-id";
[all …]
/OK3568_Linux_fs/kernel/include/linux/platform_data/
H A Dad5755.h1 /* SPDX-License-Identifier: GPL-2.0-only */
70 * struct ad5755_platform_data - AD5755 DAC driver platform data
71 * @ext_dc_dc_compenstation_resistor: Whether an external DC-DC converter
73 * @dc_dc_phase: DC-DC converter phase.
74 * @dc_dc_freq: DC-DC converter frequency.
75 * @dc_dc_maxv: DC-DC maximum allowed boost voltage.
80 * @dac.slew.enable: Whether to enable digital slew.
81 * @dac.slew.rate: Slew rate of the digital slew.
82 * @dac.slew.step_size: Slew step size of the digital slew.
96 enum ad5755_slew_rate rate; member
[all …]
/OK3568_Linux_fs/buildroot/board/qmtech/zynq/patches/linux/
H A D0001-DTS-for-QMTech-Zynq-starter-kit.patch6 Signed-off-by: Martin Chabot <martin.chabot@gmail.com>
7 Signed-off-by: Julien Olivain <juju@cotds.org>
8 ---
9 arch/arm/boot/dts/zynq-qmtech.dts | 397 ++++++++++++++++++++++++++++++
11 create mode 100644 arch/arm/boot/dts/zynq-qmtech.dts
13 diff --git a/arch/arm/boot/dts/zynq-qmtech.dts b/arch/arm/boot/dts/zynq-qmtech.dts
16 --- /dev/null
17 +++ b/arch/arm/boot/dts/zynq-qmtech.dts
18 @@ -0,0 +1,397 @@
19 +// SPDX-License-Identifier: GPL-2.0+
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3568-dram-default-timing.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip-ddr.h>
7 #include <dt-bindings/memory/rk3568-dram.h>
10 ddr3_params: ddr3-params {
50 /* slew rate when odt enable */
54 /* slew rate when odt disable */
77 ddr4_params: ddr4-params {
117 /* slew rate when odt enable */
121 /* slew rate when odt disable */
156 lpddr3_params: lpddr3-params {
[all …]
H A Dpx30s-dram-default-timing.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip-ddr.h>
7 #include <dt-bindings/memory/px30-dram.h>
10 ddr3_params: ddr3-params {
50 /* slew rate when odt enable */
54 /* slew rate when odt disable */
77 ddr4_params: ddr4-params {
117 /* slew rate when odt enable */
121 /* slew rate when odt disable */
156 lpddr2_params: lpddr2-params {
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/serdes/axp/
H A Dhigh_speed_env_spec.c4 * SPDX-License-Identifier: GPL-2.0
18 /* PEX: Change of Slew Rate port0 */
26 /* SATA: Slew rate change port 0 */
29 /* SATA: Slew rate change port 0 */
32 /* SATA: Slew rate change port 0 */
35 /* SATA: Slew rate change port 0 */
47 /* QSGMII: Amplitude and slew rate change */
72 PEX_BUS_DISABLED}, 0x0030, serdes_change_m_phy}, /* Default - Z1A */
75 0x0030, serdes_change_m_phy} /* PEX module - Z1A */
115 0x0010, serdes_change_m_phy} /* CPU1-3 */
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/dac/
H A Dad5755.txt1 * Analog Devices AD5755 IIO Multi-Channel DAC Linux Driver
4 - compatible: Has to contain one of the following:
6 adi,ad5755-1
11 - reg: spi chip select number for the device
12 - spi-cpha or spi-cpol: is the only modes that is supported
15 - spi-max-frequency: Definition as per
16 Documentation/devicetree/bindings/spi/spi-bus.txt
19 See include/dt-bindings/iio/ad5755.h
20 - adi,ext-dc-dc-compenstation-resistor: boolean set if the hardware have an
23 - adi,dc-dc-phase:
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/hisilicon/
H A Dpoplar-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/pinctrl/hisi.h>
19 emmc_pins_1: emmc-pins-1 {
20 pinctrl-single,pins = <
31 pinctrl-single,bias-pulldown = <
34 pinctrl-single,bias-pullup = <
37 pinctrl-single,slew-rate = <
40 pinctrl-single,drive-strength = <
45 emmc_pins_2: emmc-pins-2 {
[all …]
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/sdram_inc/rv1126/
H A Dsdram-rv1126-loader_params.inc33 /* slew rate when odt enable */
36 /* slew ratee when odt disable */
55 /* slew rate when odt enable */
58 /* slew ratee when odt disable */
78 /* slew rate when odt enable */
81 /* slew ratee when odt disable */
96 /* odt info and PU-cal info */
105 /* slew rate when odt enable */
108 /* slew ratee when odt disable */
132 /* lp3 dq0-7 map */
[all …]

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