1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Pinctrl dts file for HiSilicon Poplar board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <dt-bindings/pinctrl/hisi.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/* value, enable bits, disable bits, mask */ 11*4882a593Smuzhiyun#define PINCTRL_PULLDOWN(value, enable, disable, mask) \ 12*4882a593Smuzhiyun (value << 13) (enable << 13) (disable << 13) (mask << 13) 13*4882a593Smuzhiyun#define PINCTRL_PULLUP(value, enable, disable, mask) \ 14*4882a593Smuzhiyun (value << 12) (enable << 12) (disable << 12) (mask << 12) 15*4882a593Smuzhiyun#define PINCTRL_SLEW_RATE(value, mask) (value << 8) (mask << 8) 16*4882a593Smuzhiyun#define PINCTRL_DRV_STRENGTH(value, mask) (value << 4) (mask << 4) 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun&pmx0 { 19*4882a593Smuzhiyun emmc_pins_1: emmc-pins-1 { 20*4882a593Smuzhiyun pinctrl-single,pins = < 21*4882a593Smuzhiyun 0x000 MUX_M2 22*4882a593Smuzhiyun 0x004 MUX_M2 23*4882a593Smuzhiyun 0x008 MUX_M2 24*4882a593Smuzhiyun 0x00c MUX_M2 25*4882a593Smuzhiyun 0x010 MUX_M2 26*4882a593Smuzhiyun 0x014 MUX_M2 27*4882a593Smuzhiyun 0x018 MUX_M2 28*4882a593Smuzhiyun 0x01c MUX_M2 29*4882a593Smuzhiyun 0x024 MUX_M2 30*4882a593Smuzhiyun >; 31*4882a593Smuzhiyun pinctrl-single,bias-pulldown = < 32*4882a593Smuzhiyun PINCTRL_PULLDOWN(0, 1, 0, 1) 33*4882a593Smuzhiyun >; 34*4882a593Smuzhiyun pinctrl-single,bias-pullup = < 35*4882a593Smuzhiyun PINCTRL_PULLUP(0, 1, 0, 1) 36*4882a593Smuzhiyun >; 37*4882a593Smuzhiyun pinctrl-single,slew-rate = < 38*4882a593Smuzhiyun PINCTRL_SLEW_RATE(1, 1) 39*4882a593Smuzhiyun >; 40*4882a593Smuzhiyun pinctrl-single,drive-strength = < 41*4882a593Smuzhiyun PINCTRL_DRV_STRENGTH(0xb, 0xf) 42*4882a593Smuzhiyun >; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun emmc_pins_2: emmc-pins-2 { 46*4882a593Smuzhiyun pinctrl-single,pins = < 47*4882a593Smuzhiyun 0x028 MUX_M2 48*4882a593Smuzhiyun >; 49*4882a593Smuzhiyun pinctrl-single,bias-pulldown = < 50*4882a593Smuzhiyun PINCTRL_PULLDOWN(0, 1, 0, 1) 51*4882a593Smuzhiyun >; 52*4882a593Smuzhiyun pinctrl-single,bias-pullup = < 53*4882a593Smuzhiyun PINCTRL_PULLUP(0, 1, 0, 1) 54*4882a593Smuzhiyun >; 55*4882a593Smuzhiyun pinctrl-single,slew-rate = < 56*4882a593Smuzhiyun PINCTRL_SLEW_RATE(1, 1) 57*4882a593Smuzhiyun >; 58*4882a593Smuzhiyun pinctrl-single,drive-strength = < 59*4882a593Smuzhiyun PINCTRL_DRV_STRENGTH(0x9, 0xf) 60*4882a593Smuzhiyun >; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun emmc_pins_3: emmc-pins-3 { 64*4882a593Smuzhiyun pinctrl-single,pins = < 65*4882a593Smuzhiyun 0x02c MUX_M2 66*4882a593Smuzhiyun >; 67*4882a593Smuzhiyun pinctrl-single,bias-pulldown = < 68*4882a593Smuzhiyun PINCTRL_PULLDOWN(0, 1, 0, 1) 69*4882a593Smuzhiyun >; 70*4882a593Smuzhiyun pinctrl-single,bias-pullup = < 71*4882a593Smuzhiyun PINCTRL_PULLUP(0, 1, 0, 1) 72*4882a593Smuzhiyun >; 73*4882a593Smuzhiyun pinctrl-single,slew-rate = < 74*4882a593Smuzhiyun PINCTRL_SLEW_RATE(1, 1) 75*4882a593Smuzhiyun >; 76*4882a593Smuzhiyun pinctrl-single,drive-strength = < 77*4882a593Smuzhiyun PINCTRL_DRV_STRENGTH(3, 3) 78*4882a593Smuzhiyun >; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun emmc_pins_4: emmc-pins-4 { 82*4882a593Smuzhiyun pinctrl-single,pins = < 83*4882a593Smuzhiyun 0x030 MUX_M2 84*4882a593Smuzhiyun >; 85*4882a593Smuzhiyun pinctrl-single,bias-pulldown = < 86*4882a593Smuzhiyun PINCTRL_PULLDOWN(1, 1, 0, 1) 87*4882a593Smuzhiyun >; 88*4882a593Smuzhiyun pinctrl-single,bias-pullup = < 89*4882a593Smuzhiyun PINCTRL_PULLUP(0, 1, 0, 1) 90*4882a593Smuzhiyun >; 91*4882a593Smuzhiyun pinctrl-single,slew-rate = < 92*4882a593Smuzhiyun PINCTRL_SLEW_RATE(1, 1) 93*4882a593Smuzhiyun >; 94*4882a593Smuzhiyun pinctrl-single,drive-strength = < 95*4882a593Smuzhiyun PINCTRL_DRV_STRENGTH(3, 3) 96*4882a593Smuzhiyun >; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun}; 99