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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/hwlock/
H A Drockchip-hwspinlock.txt19 reg = <0 0xff040000 0 0x10000>;
26 hwlocks = <&hwlock 0>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/
H A Drockchip,pdm.yaml72 enum: [ 0, 1, 2, 3 ]
75 const: 0
102 reg = <0x0 0xff040000 0x0 0x1000>;
108 #sound-dai-cells = <0>;
110 pinctrl-0 = <&pdmm0_clk
/OK3568_Linux_fs/u-boot/include/
H A Dirq-platform.h11 #define GPIO0_PHYS 0x2007C000
12 #define GPIO1_PHYS 0x20080000
13 #define GPIO2_PHYS 0x20084000
14 #define GPIO3_PHYS 0x20088000
30 #define GPIO0_PHYS 0x11110000
31 #define GPIO1_PHYS 0x11120000
32 #define GPIO2_PHYS 0x11130000
33 #define GPIO3_PHYS 0x11140000
50 #define GPIO0_PHYS 0xFF750000
51 #define GPIO1_PHYS 0xFF780000
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Deb_cpu5282.h21 #define CONFIG_SYS_UART_PORT (0)
37 #define STATUS_LED_ACTIVE 0
44 #define CONFIG_ENV_ADDR 0xFF040000
45 #define CONFIG_ENV_SECT_SIZE 0x00020000
67 #define CONFIG_SYS_LOAD_ADDR 0x20000
69 #define CONFIG_SYS_MEMTEST_START 0x100000
70 #define CONFIG_SYS_MEMTEST_END 0x400000
81 #define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
82 #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
95 #define CONFIG_SYS_FEC0_PINMUX 0
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rv1106/
H A Drv1106.c20 #define PERI_GRF_BASE 0xff000000
21 #define PERI_GRF_PERI_CON1 0x0004
23 #define CORE_GRF_BASE 0xff040000
24 #define CORE_GRF_CACHE_PERI_ADDR_START 0x0024
25 #define CORE_GRF_CACHE_PERI_ADDR_END 0x0028
26 #define CORE_GRF_MCU_CACHE_MISC 0x002c
28 #define PERI_GRF_BASE 0xff000000
29 #define PERI_GRF_USBPHY_CON0 0x0050
31 #define PERI_SGRF_BASE 0xff070000
32 #define PERI_SGRF_FIREWALL_CON0 0x0020
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3562/
H A Drk3562.c23 #define FIREWALL_DDR_BASE 0xfef00000
24 #define FW_DDR_MST3_REG 0x2c /* usb */
25 #define FW_DDR_MST4_REG 0x30 /* emmc */
26 #define FW_DDR_MST5_REG 0x34 /* fspi */
27 #define FW_DDR_MST6_REG 0x38 /* sdmmc mcu */
28 #define FW_DDR_CON_REG 0x80
30 #define PMU_GRF_BASE 0xff010000
31 #define PMU_GRF_SOC_CON9 0x0124
33 #define SYS_GRF_BASE 0xff030000
34 #define SYS_GRF_SOC_CON5 0x0414
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/px30/
H A Dpx30.c20 #define PMU_PWRDN_CON 0xff000018
21 #define GRF_CPU_CON1 0xff140504
23 #define USBPHY_GRF_BASE 0xff2c0000
24 #define VIDEO_PHY_BASE 0xff2e0000
25 #define FW_DDR_CON_REG 0xff534040
26 #define SERVICE_CORE_ADDR 0xff508000
27 #define QOS_PRIORITY 0x08
36 .virt = 0x0UL,
37 .phys = 0x0UL,
38 .size = 0xff000000UL,
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi25 #size-cells = <0>;
27 cpu0: cpu@0 {
32 reg = <0x0>;
40 reg = <0x1>;
49 reg = <0x2>;
58 reg = <0x3>;
66 CPU_SLEEP_0: cpu-sleep-0 {
68 arm,psci-suspend-param = <0x40000000>;
110 interrupts = <0 143 4>,
111 <0 144 4>,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dzynqmp.dtsi18 #size-cells = <0>;
20 cpu@0 {
24 reg = <0x0>;
32 reg = <0x1>;
40 reg = <0x2>;
48 reg = <0x3>;
55 CPU_SLEEP_0: cpu-sleep-0 {
57 arm,psci-suspend-param = <0x40000000>;
76 #power-domain-cells = <0x0>;
77 pd-id = <0x16>;
[all …]
H A Dpx30.dtsi34 #size-cells = <0>;
36 cpu0: cpu@0 {
39 reg = <0x0 0x0>;
46 reg = <0x0 0x1>;
52 reg = <0x0 0x2>;
58 reg = <0x0 0x3>;
74 reg = <0x0 0xff2a0000 0x0 0x1000>;
94 #clock-cells = <0>;
112 #clock-cells = <0>;
119 reg = <0x0 0xff000000 0x0 0x1000>;
[all …]
H A Drv1126.dtsi46 #size-cells = <0>;
51 reg = <0xf00>;
61 reg = <0xf01>;
71 reg = <0xf02>;
81 reg = <0xf03>;
94 arm,psci-suspend-param = <0x0010000>;
164 bus-id = <0>;
165 cfg-val = <0x00300020>;
166 enable-msk = <0x7144>;
171 cfg-val = <0x00300020>;
[all …]
H A Drk3562.dtsi71 #clock-cells = <0>;
78 #clock-cells = <0>;
85 reg = <0 0xff100324 0 0x10>;
89 #clock-cells = <0>;
94 reg = <0 0xff100328 0 0x10>;
98 #clock-cells = <0>;
103 reg = <0 0xff10032c 0 0x10>;
107 #clock-cells = <0>;
112 reg = <0 0xff100334 0 0x10>;
116 #clock-cells = <0>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi40 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0x0 0x0>;
58 reg = <0x0 0x1>;
71 reg = <0x0 0x2>;
84 reg = <0x0 0x3>;
100 arm,psci-suspend-param = <0x0010000>;
157 reg = <0x0 0xff1f0000 0x0 0x4000>;
158 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
228 #clock-cells = <0>;
[all …]
H A Drk3308.dtsi47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0x0 0x0>;
73 reg = <0x0 0x1>;
83 reg = <0x0 0x2>;
93 reg = <0x0 0x3>;
106 arm,psci-suspend-param = <0x0010000>;
123 rockchip,low-temp = <0>;
128 0 1296 50000
136 0 54000 0
[all …]
H A Drk1808.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0 0x0>;
69 reg = <0x0 0x1>;
83 arm,psci-suspend-param = <0x0010000>;
92 arm,psci-suspend-param = <0x1010000>;
105 rockchip,low-temp = <0>;
109 0 1608 50000
118 0 69000 0
124 rockchip,pvtm-ch = <0 0>;
[all …]
H A Dpx30.dtsi49 #size-cells = <0>;
51 cpu0: cpu@0 {
54 reg = <0x0 0x0>;
66 reg = <0x0 0x1>;
78 reg = <0x0 0x2>;
90 reg = <0x0 0x3>;
105 arm,psci-suspend-param = <0x0010000>;
114 arm,psci-suspend-param = <0x1010000>;
127 rockchip,low-temp = <0>;
131 0 1512 50000
[all …]
H A Drk3562.dtsi72 #clock-cells = <0>;
79 #clock-cells = <0>;
86 reg = <0 0xff100324 0 0x10>;
90 #clock-cells = <0>;
95 reg = <0 0xff100328 0 0x10>;
99 #clock-cells = <0>;
104 reg = <0 0xff10032c 0 0x10>;
108 #clock-cells = <0>;
113 reg = <0 0xff100334 0 0x10>;
117 #clock-cells = <0>;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_hsi.h17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0
25 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
31 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0
33 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
42 #define PIN_CFG_NA 0x00000000
43 #define PIN_CFG_GPIO0_P0 0x00000001
44 #define PIN_CFG_GPIO1_P0 0x00000002
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drv1126.dtsi50 #size-cells = <0>;
55 reg = <0xf00>;
67 reg = <0xf01>;
78 reg = <0xf02>;
89 reg = <0xf03>;
103 arm,psci-suspend-param = <0x0010000>;
127 0 5
131 1 0
134 0 100500 1
141 rockchip,pvtm-ch = <0 0>;
[all …]