refactor(amu): conditionally compile auxiliary counter support

This change reduces preprocessor dependencies on the
`AMU_GROUP1_NR_COUNTERS` and `AMU_GROUP1_COUNTERS_MASK` definitions, as
these valu

refactor(amu): conditionally compile auxiliary counter support

This change reduces preprocessor dependencies on the
`AMU_GROUP1_NR_COUNTERS` and `AMU_GROUP1_COUNTERS_MASK` definitions, as
these values will eventually be discovered dynamically.

In their stead, we introduce the `ENABLE_AMU_AUXILIARY_COUNTERS` build
option, which will enable support for dynamically detecting and
enabling auxiliary AMU counters.

This substantially reduces the amount of memory used by platforms that
know ahead of time that they do not have any auxiliary AMU counters.

Change-Id: I3d998aff44ed5489af4857e337e97634d06e3ea1
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge changes from topic "fvpr_cleanup" into integration

* changes:
refactor(tbbr): remove "fvp_r" platform specific check
refactor(Makefile): move NEED_<IMAGE> before their use

refactor(tbbr): remove "fvp_r" platform specific check

fvp_r is a unique platform which does not have BL2 binary and image
loading functionality is performed by BL1 itself. To avoid
generating certi

refactor(tbbr): remove "fvp_r" platform specific check

fvp_r is a unique platform which does not have BL2 binary and image
loading functionality is performed by BL1 itself. To avoid
generating certificate for BL2 there was platform specific check
added which looks bit ugly, replacing that check.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I11360fa753f847768906c42dce652296245b4a63

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feat(rme): add ENABLE_RME build option and support for RMM image

The changes include:

- A new build option (ENABLE_RME) to enable FEAT_RME

- New image called RMM. RMM is R-EL2 firmware that manage

feat(rme): add ENABLE_RME build option and support for RMM image

The changes include:

- A new build option (ENABLE_RME) to enable FEAT_RME

- New image called RMM. RMM is R-EL2 firmware that manages Realms.
When building TF-A, a path to RMM image can be specified using
the "RMM" build flag. If RMM image is not provided, TRP is built
by default and used as RMM image.

- Support for RMM image in fiptool

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I017c23ef02e465a5198baafd665a60858ecd1b25

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refactor(makefile): remove BL prefixes in build macros

The current Makefile assumes all TF-A binaries
have BL prefixes (BL1, BL2, etc). Now that we
have other binary names with FEAT_RME feature, rem

refactor(makefile): remove BL prefixes in build macros

The current Makefile assumes all TF-A binaries
have BL prefixes (BL1, BL2, etc). Now that we
have other binary names with FEAT_RME feature, remove
this assumption. With this change, we need to pass
the full name of a binary when using build macros.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I44e094b2366aa526f807d92dffa709390d14d145

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fvp_r: load, auth, and transfer from BL1 to BL33

Adding load, authentication, and transfer functionality from FVP R BL1 to
BL33, which will be the partner runtime code.

Signed-off-by: Lauren Wehrme

fvp_r: load, auth, and transfer from BL1 to BL33

Adding load, authentication, and transfer functionality from FVP R BL1 to
BL33, which will be the partner runtime code.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I293cad09739dacac0d20dd57c1d98178dbe84d40

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Merge "build(bl2): enable SP pkg loading for S-EL1 SPMC" into integration

build(bl2): enable SP pkg loading for S-EL1 SPMC

Currently the SP package loading mechanism is only enabled when S-EL2
SPMC is selected. Remove this limitation.

Signed-off-by: Balint Dobszay <balin

build(bl2): enable SP pkg loading for S-EL1 SPMC

Currently the SP package loading mechanism is only enabled when S-EL2
SPMC is selected. Remove this limitation.

Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
Change-Id: I5bf5a32248e85a26d0345cacff7d539eed824cfc

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feat(hcx): add build option to enable FEAT_HCX

FEAT_HCX adds the extended hypervisor configuration register (HCRX_EL2)
and access to this register must be explicitly enabled through the
SCR_EL3.HXEn

feat(hcx): add build option to enable FEAT_HCX

FEAT_HCX adds the extended hypervisor configuration register (HCRX_EL2)
and access to this register must be explicitly enabled through the
SCR_EL3.HXEn bit. This patch adds a new build flag ENABLE_FEAT_HCX to
allow the register to be accessed from EL2.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ibb36ad90622f1dc857adab4b0d4d7a89456a522b

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feat(trf): enable trace filter control register access from lower NS EL

Introduced a build flag 'ENABLE_TRF_FOR_NS' to enable trace filter
control registers access in NS-EL2, or NS-EL1 (when NS-EL2

feat(trf): enable trace filter control register access from lower NS EL

Introduced a build flag 'ENABLE_TRF_FOR_NS' to enable trace filter
control registers access in NS-EL2, or NS-EL1 (when NS-EL2 is
implemented but unused).

Change-Id: If3f53b8173a5573424b9a405a4bd8c206ffdeb8c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(sys_reg_trace): enable trace system registers access from lower NS ELs

Introduced a build flag 'ENABLE_SYS_REG_TRACE_FOR_NS' to enable trace
system registers access in NS-EL2, or NS-EL1 (when N

feat(sys_reg_trace): enable trace system registers access from lower NS ELs

Introduced a build flag 'ENABLE_SYS_REG_TRACE_FOR_NS' to enable trace
system registers access in NS-EL2, or NS-EL1 (when NS-EL2 is
implemented but unused).

Change-Id: Idc1acede4186e101758cbf7bed5af7b634d7d18d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(trbe): enable access to trace buffer control registers from lower NS EL

Introduced a build flag 'ENABLE_TRBE_FOR_NS' to enable trace buffer
control registers access in NS-EL2, or NS-EL1 (when N

feat(trbe): enable access to trace buffer control registers from lower NS EL

Introduced a build flag 'ENABLE_TRBE_FOR_NS' to enable trace buffer
control registers access in NS-EL2, or NS-EL1 (when NS-EL2 is
implemented but unused).

Change-Id: I285a672ccd395eebd377714c992bb21062a729cc
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fwu): initialize FWU driver in BL2

Initialized FWU driver module in BL2 component under
build flag PSA_FWU_SUPPORT.

Change-Id: I08b191599835925c355981d695667828561b9a21
Signed-off-by: Manish V

feat(fwu): initialize FWU driver in BL2

Initialized FWU driver module in BL2 component under
build flag PSA_FWU_SUPPORT.

Change-Id: I08b191599835925c355981d695667828561b9a21
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fwu_metadata): add FWU metadata header and build options

Added a firmware update metadata structure as per section 4.1
in the specification document[1].

Also, added the build options used in d

feat(fwu_metadata): add FWU metadata header and build options

Added a firmware update metadata structure as per section 4.1
in the specification document[1].

Also, added the build options used in defining the firmware
update metadata structure.

[1]: https://developer.arm.com/documentation/den0118/a/

Change-Id: I8f43264a46fde777ceae7fd2a5bb0326f1711928
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(sve): enable SVE for the secure world

Enables SVE support for the secure world via ENABLE_SVE_FOR_SWD.
ENABLE_SVE_FOR_SWD defaults to 0 and has to be explicitly set by the
platform. SVE is conf

feat(sve): enable SVE for the secure world

Enables SVE support for the secure world via ENABLE_SVE_FOR_SWD.
ENABLE_SVE_FOR_SWD defaults to 0 and has to be explicitly set by the
platform. SVE is configured during initial setup and then uses EL3
context save/restore routine to switch between SVE configurations for
different contexts.
Reset value of CPTR_EL3 changed to be most restrictive by default.

Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
Change-Id: I889fbbc2e435435d66779b73a2d90d1188bf4116

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SMCCC/PCI: Add initial PCI conduit definitions

Add constants, structures and build definition for the
new standard SMCCC PCI conduit. These are documented
in DEN0115A.

https://developer.arm.com/doc

SMCCC/PCI: Add initial PCI conduit definitions

Add constants, structures and build definition for the
new standard SMCCC PCI conduit. These are documented
in DEN0115A.

https://developer.arm.com/documentation/den0115/latest

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Change-Id: If667800a26b9ae88626e8d895674c9c2e8c09658

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tbbr-tools: enable override TRUSTED_KEY_CERT

Platforms, which requires additional images to be
verified using TBBR; such that their key certificate
is tied to TRUSTED_KEY_CERT.

For such platforms,

tbbr-tools: enable override TRUSTED_KEY_CERT

Platforms, which requires additional images to be
verified using TBBR; such that their key certificate
is tied to TRUSTED_KEY_CERT.

For such platforms, if make commands runs twice:
- Once with targets as bl2 & fip.bin, and
- Again to build the target as the additional image.

then, if path to the TRUSTED_KEY_CERT varies in the
makefile with make-target of the additional image, then
there would be two location where "trusted_key.crt" will
be created.

This patch helps overriding the TRUSTED_KEY_CERT from any .mk
in the platform's makefile structure.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I775a2c409035504b21b0bbe5a4f9046898163eed

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Enable v8.6 AMU enhancements (FEAT_AMUv1p1)

ARMv8.6 adds virtual offset registers to support virtualization of the
event counters in EL1 and EL0. This patch enables support for this
feature in EL3

Enable v8.6 AMU enhancements (FEAT_AMUv1p1)

ARMv8.6 adds virtual offset registers to support virtualization of the
event counters in EL1 and EL0. This patch enables support for this
feature in EL3 firmware.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7ee1f3d9f554930bf5ef6f3d492e932e6d95b217

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Add TRNG Firmware Interface service

This adds the TRNG Firmware Interface Service to the standard
service dispatcher. This includes a method for dispatching entropy
requests to platforms and include

Add TRNG Firmware Interface service

This adds the TRNG Firmware Interface Service to the standard
service dispatcher. This includes a method for dispatching entropy
requests to platforms and includes an entropy pool implementation to
avoid dropping any entropy requested from the platform.

Change-Id: I71cadb3cb377a507652eca9e0d68714c973026e9
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Makefile: Fix ${FIP_NAME} to be rebuilt only when needed

Currently ${FIP_DEPS} as prerequisite for ${BUILD_PLAT}/${FIP_NAME}
contains .PHONY targets check_$(1) and therefore ${BUILD_PLAT}/${FIP_NAME

Makefile: Fix ${FIP_NAME} to be rebuilt only when needed

Currently ${FIP_DEPS} as prerequisite for ${BUILD_PLAT}/${FIP_NAME}
contains .PHONY targets check_$(1) and therefore ${BUILD_PLAT}/${FIP_NAME}
is always rebuilt even when other file target prerequisites are not
changed.

These changes fix above issue and ${BUILD_PLAT}/${FIP_NAME} target is
rebuilt only when its prerequisites are changed.

There are 3 changes:

Content of check_$(1) target is moved into check_$(1)_cmd variable so it
can be easily reused.

.PHONY check_$(1) targets are not put into ${FIP_DEPS} and ${FWU_FIP_DEPS}
dependencies anymore and required checks which are in ${CHECK_FIP_CMD} and
${CHECK_FWU_FIP_CMD} variables are executed as part of targets
${BUILD_PLAT}/${FIP_NAME} and ${BUILD_PLAT}/${FWU_FIP_NAME} itself.

To ensure that ${BUILD_PLAT}/${FIP_NAME} and ${BUILD_PLAT}/${FWU_FIP_NAME}
are rebuilt even when additional dependency file image added by
TOOL_ADD_IMG is changed, this file image (if exists) is added as file
dependency to ${FIP_DEPS} and ${FWU_FIP_DEPS}. If it does not exist then
FORCE target is added to ensure that FIP/FWU_FIP is rebuilt. Command
${CHECK_FIP_CMD}/${CHECK_FWU_FIP_CMD} will then thrown an error message if
the file is required but not present.

So this change ensures that if BL33 image is updated then final FIP image
is updated too. And if BL33 image is not specified or does not exist and is
required to be present then check_$(1)_cmd call from ${CHECK_FIP_CMD} would
ensure that error message is thrown during build.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I635cf82e2b667ff57e2af83500d4aca71d235e3e

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Merge "Add support for FEAT_MTPMU for Armv8.6" into integration

Add support for FEAT_MTPMU for Armv8.6

If FEAT_PMUv3 is implemented and PMEVTYPER<n>(_EL0).MT bit is implemented
as well, it is possible to control whether PMU counters take into account
events happ

Add support for FEAT_MTPMU for Armv8.6

If FEAT_PMUv3 is implemented and PMEVTYPER<n>(_EL0).MT bit is implemented
as well, it is possible to control whether PMU counters take into account
events happening on other threads.

If FEAT_MTPMU is implemented, EL3 (or EL2) can override the MT bit
leaving it to effective state of 0 regardless of any write to it.

This patch introduces the DISABLE_MTPMU flag, which allows to diable
multithread event count from EL3 (or EL2). The flag is disabled
by default so the behavior is consistent with those architectures
that do not implement FEAT_MTPMU.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Iee3a8470ae8ba13316af1bd40c8d4aa86e0cb85e

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TF-A: Add build option for Arm Feature Modifiers

This patch adds a new ARM_ARCH_FEATURE build option
to add support for compiler's feature modifiers.
It has the form '[no]feature+...' and defaults t

TF-A: Add build option for Arm Feature Modifiers

This patch adds a new ARM_ARCH_FEATURE build option
to add support for compiler's feature modifiers.
It has the form '[no]feature+...' and defaults to
'none'. This option translates into compiler option
'-march=armvX[.Y]-a+[no]feature+...'.

Change-Id: I37742f270a898f5d6968e146cbcc04cbf53ef2ad
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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make_helpers: tbbr: Fix FWU certificate generation

Provide missed command line parameters such as KEY_ALG, HASH_ALG
and KEY_SIZE while generating the FWU certificate.

Signed-off-by: Gilad Ben Yosse

make_helpers: tbbr: Fix FWU certificate generation

Provide missed command line parameters such as KEY_ALG, HASH_ALG
and KEY_SIZE while generating the FWU certificate.

Signed-off-by: Gilad Ben Yossef <Gilad.BenYossef@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I017fa3fff844f4262ae2441cbc9fee909d357fb3

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lib: el3_runtime: Conditionally save/restore EL2 NEVE registers

Include EL2 registers related to Nested Virtualization in EL2 context
save/restore routines if architecture supports it and platform w

lib: el3_runtime: Conditionally save/restore EL2 NEVE registers

Include EL2 registers related to Nested Virtualization in EL2 context
save/restore routines if architecture supports it and platform wants to
use these features in Secure world.

Change-Id: If006ab83bbc2576488686f5ffdff88b91adced5c
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>

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