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Searched refs:u32HVD_STREAM_DISPCMDQ_WD (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/
H A DhalVPU_EX.c3877 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
3890 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
3933 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
3949 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
3951 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
3952 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h437 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DhalVPU_EX.c4018 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4031 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4070 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4086 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4088 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4089 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h441 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/
H A DhalVPU_EX.c4203 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4216 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4255 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4271 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4273 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4274 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h449 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DhalVPU_EX.c4200 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4213 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4252 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4268 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4270 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4271 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h437 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DhalVPU_EX.c4152 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4165 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4204 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4220 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4222 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4223 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h345 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DhalVPU_EX.c4019 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4032 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4071 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4087 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4089 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4090 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h315 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DhalVPU_EX.c4080 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4093 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4132 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4148 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4150 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4151 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h437 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DhalVPU_EX.c4464 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4477 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4516 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4532 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4534 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4535 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h441 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DhalVPU_EX.c4482 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4495 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4534 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4550 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4552 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4553 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h441 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DhalVPU_EX.c4627 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4640 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4679 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4695 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4697 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4698 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A DhalVPU_EX.c4630 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4643 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4682 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4698 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4700 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4701 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DhalVPU_EX.c4637 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4650 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4689 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4705 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4707 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4708 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DhalVPU_EX.c4623 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4636 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4675 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4691 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4693 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4694 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
H A Dcontroller.h437 …unsigned int u32HVD_STREAM_DISPCMDQ_WD; //0x0FB0 // stream display command queue write ptr for V… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DhalVPU_EX.c4650 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4663 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4702 …alContext->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4718 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4720 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4721 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DhalVPU_EX.c4500 return cmd_q->u32HVD_STREAM_DISPCMDQ_WD == cmd_q->u32HVD_STREAM_DISPCMDQ_RD; in HAL_VPU_EX_DRAMDispCMDQueueIsEmpty()
4513 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_DISPCMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE… in HAL_VPU_EX_DRAMDispCMDQueueIsFull()
4554 …1(pVPUCtx->u32FWCodeAddr + cmd_q->u32HVD_DISPCMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_DISPCMDQ_WD); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4570 … cmd_q->u32HVD_STREAM_DISPCMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4572 if (cmd_q->u32HVD_STREAM_DISPCMDQ_WD == HVD_DISPCMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()
4573 cmd_q->u32HVD_STREAM_DISPCMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamDispCMDQueueSend()

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