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Searched refs:HVD_REG_RESET_MIU_256 (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DregHVD_EX.h250 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3483 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h250 #define HVD_REG_RESET_MIU_256 BIT(14) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h251 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3499 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h251 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3460 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h251 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3535 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h251 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3576 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h250 #define HVD_REG_RESET_MIU_256 BIT(14) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DregHVD_EX.h251 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3473 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h251 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3513 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DregHVD_EX.h263 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c3786 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU_256 , HVD_REG_RESET_MIU_256); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h251 #define HVD_REG_RESET_MIU_256 BIT(14) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DregHVD_EX.h255 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c4393 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU_256 ); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DregHVD_EX.h255 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c4378 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU_256 ); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/
H A DregHVD_EX.h255 #define HVD_REG_RESET_MIU_256 BIT(14) macro
H A DhalHVD_EX.c4515 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU_256 ); in HAL_HVD_EX_InitHW()