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Searched refs:pll_rk3328 (Results 1 – 19 of 19) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3328.c217 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
220 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
223 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
226 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
229 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
H A Dclk-rk3562.c121 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
125 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
128 [vpll] = PLL(pll_rk3328, PLL_VPLL, "vpll", mux_pll_p,
132 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
136 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
139 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
H A Dclk-rv1126.c226 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
232 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
235 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
239 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
242 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
246 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
249 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
H A Dclk-rk3568.c320 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
323 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
329 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
332 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
335 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
338 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
341 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
344 [vpll] = PLL(pll_rk3328, PLL_VPLL, "vpll", mux_pll_p,
H A Dclk-px30.c190 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
193 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
196 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
199 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
205 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p, 0, PX30_PMU_PLL_CON(0),
H A Dclk-pll.c1536 case pll_rk3328: in rockchip_pll_clk_compensation()
1577 case pll_rk3328: in rockchip_pll_clk_compensation()
1639 if ((pll_type != pll_rk3328 && num_parents != 2) || in rockchip_clk_register_pll()
1640 (pll_type == pll_rk3328 && num_parents != 1)) { in rockchip_clk_register_pll()
1657 if (pll_type == pll_rk3328) in rockchip_clk_register_pll()
1675 if (pll_type == pll_rk3328) in rockchip_clk_register_pll()
1719 case pll_rk3328: in rockchip_clk_register_pll()
1788 case pll_rk3328: in rockchip_pll_con_to_rate()
H A Dclk-rk3528.c174 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
178 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
182 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
186 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
191 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
H A Dclk-rk3308.c184 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
187 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
190 [vpll0] = PLL(pll_rk3328, PLL_VPLL0, "vpll0", mux_pll_p,
193 [vpll1] = PLL(pll_rk3328, PLL_VPLL1, "vpll1", mux_pll_p,
H A Dclk-rv1106.c253 [apll] = PLL(pll_rk3328, PLL_APLL, "apll", mux_pll_p,
256 [cpll] = PLL(pll_rk3328, PLL_CPLL, "cpll", mux_pll_p,
259 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p,
262 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
H A Dclk.h450 pll_rk3328, enumerator
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c106 [APLL] = PLL(pll_rk3328, PLL_APLL, RK3328_PLL_CON(0),
108 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3328_PLL_CON(8),
110 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3328_PLL_CON(16),
112 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RK3328_PLL_CON(24),
114 [NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3328_PLL_CON(40),
H A Dclk_rk3308.c76 [APLL] = PLL(pll_rk3328, PLL_APLL, RK3308_PLL_CON(0),
78 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3308_PLL_CON(8),
80 [VPLL0] = PLL(pll_rk3328, PLL_VPLL0, RK3308_PLL_CON(16),
82 [VPLL1] = PLL(pll_rk3328, PLL_VPLL1, RK3308_PLL_CON(24),
H A Dclk_rk3562.c45 [APLL] = PLL(pll_rk3328, PLL_APLL, RK3562_PLL_CON(0),
47 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RK3562_PLL_CON(24),
49 [VPLL] = PLL(pll_rk3328, PLL_VPLL, RK3562_PLL_CON(32),
51 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3562_PLL_CON(40),
53 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3562_PMU1_PLL_CON(0),
55 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3562_SUBDDR_PLL_CON(0),
H A Dclk_rv1106.c39 [APLL] = PLL(pll_rk3328, PLL_APLL, RV1106_PLL_CON(0),
41 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RV1106_PLL_CON(16),
43 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RV1106_PLL_CON(8),
45 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1106_PLL_CON(24),
H A Dclk_pll.c578 case pll_rk3328: in rockchip_pll_get_rate()
607 case pll_rk3328: in rockchip_pll_set_rate()
H A Dclk_rk3528.c66 [APLL] = PLL(pll_rk3328, PLL_APLL, RK3528_PLL_CON(0),
69 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3528_PLL_CON(8),
72 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RK3528_PLL_CON(24),
75 [PPLL] = PLL(pll_rk3328, PLL_PPLL, RK3528_PCIE_PLL_CON(32),
78 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3528_DDRPHY_PLL_CON(16),
H A Dclk_rk3568.c68 [APLL] = PLL(pll_rk3328, PLL_APLL, RK3568_PLL_CON(0),
70 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RK3568_PLL_CON(8),
72 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RK3568_PLL_CON(24),
74 [GPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PLL_CON(16),
76 [NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3568_PLL_CON(32),
78 [VPLL] = PLL(pll_rk3328, PLL_VPLL, RK3568_PLL_CON(40),
80 [PPLL] = PLL(pll_rk3328, PLL_PPLL, RK3568_PMU_PLL_CON(0),
82 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RK3568_PMU_PLL_CON(16),
H A Dclk_rv1126.c60 [APLL] = PLL(pll_rk3328, PLL_APLL, RV1126_PLL_CON(0),
62 [DPLL] = PLL(pll_rk3328, PLL_DPLL, RV1126_PLL_CON(8),
64 [CPLL] = PLL(pll_rk3328, PLL_CPLL, RV1126_PLL_CON(16),
66 [HPLL] = PLL(pll_rk3328, PLL_HPLL, RV1126_PLL_CON(24),
68 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1126_PMU_PLL_CON(0),
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h111 pll_rk3328, enumerator