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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/
H A Dallwinner,sun4i-a10-timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timer Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - allwinner,sun4i-a10-timer
17 - allwinner,sun8i-a23-timer
18 - allwinner,sun8i-v3s-timer
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/clock/sun4i-a10-pll2.h>
48 #include <dt-bindings/dma/sun4i-a10.h>
49 #include <dt-bindings/pinctrl/sun4i-a10.h>
52 interrupt-parent = <&intc>;
55 #address-cells = <1>;
56 #size-cells = <0>;
60 compatible = "arm,cortex-a8";
[all …]
H A Dsun5i-gr8.dtsi4 * Mylène Josserand <mylene.josserand@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun4i-a10-pll2.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/pinctrl/sun4i-a10.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
56 #size-cells = <0>;
[all …]
H A Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/thermal/thermal.h>
50 #include <dt-bindings/clock/sun4i-a10-pll2.h>
51 #include <dt-bindings/dma/sun4i-a10.h>
52 #include <dt-bindings/pinctrl/sun4i-a10.h>
55 interrupt-parent = <&gic>;
62 #address-cells = <1>;
63 #size-cells = <1>;
[all …]
H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun4i-a10-pll2.h>
49 #include <dt-bindings/dma/sun4i-a10.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&intc>;
60 #address-cells = <1>;
61 #size-cells = <1>;
65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
[all …]
H A Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/thermal/thermal.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
60 #address-cells = <1>;
61 #size-cells = <1>;
65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
[all …]
H A Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/pinctrl/sun4i-a10.h>
52 interrupt-parent = <&gic>;
55 #address-cells = <1>;
56 #size-cells = <1>;
60 compatible = "allwinner,simple-framebuffer",
61 "simple-framebuffer";
[all …]
H A Dsun8i-h3.dtsi4 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/pinctrl/sun4i-a10.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
51 interrupt-parent = <&gic>;
58 #address-cells = <1>;
59 #size-cells = <0>;
62 compatible = "arm,cortex-a7";
68 compatible = "arm,cortex-a7";
[all …]
H A Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
56 #address-cells = <1>;
57 #size-cells = <0>;
60 compatible = "arm,cortex-a7";
66 compatible = "arm,cortex-a7";
72 compatible = "arm,cortex-a7";
78 compatible = "arm,cortex-a7";
[all …]
H A Dsun8i-v3s.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
44 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/pinctrl/sun4i-a10.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
51 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
H A Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/pinctrl/sun4i-a10.h>
52 interrupt-parent = <&gic>;
55 #address-cells = <1>;
56 #size-cells = <0>;
59 compatible = "arm,cortex-a7";
65 compatible = "arm,cortex-a7";
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
[all …]
H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
H A Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
[all …]
H A Dsuniv-f1c100s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&intc>;
13 osc24M: clk-24M {
14 #clock-cells = <0>;
15 compatible = "fixed-clock";
16 clock-frequency = <24000000>;
17 clock-output-names = "osc24M";
20 osc32k: clk-32k {
[all …]
H A Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
[all …]
H A Dsun8i-h3.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include "sunxi-h3-h5.dtsi"
44 #include <dt-bindings/thermal/thermal.h>
47 cpu0_opp_table: opp-table-cpu {
48 compatible = "operating-points-v2";
49 opp-shared;
51 opp-648000000 {
52 opp-hz = /bits/ 64 <648000000>;
53 opp-microvolt = <1040000 1040000 1300000>;
54 clock-latency-ns = <244144>; /* 8 32k periods */
[all …]
H A Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
[all …]
H A Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
48 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
51 interrupt-parent = <&gic>;
52 #address-cells = <1>;
53 #size-cells = <1>;
56 #address-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Dtimer-sun4i.c2 * Allwinner A1X SoCs timer handling.
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
27 #include "timer-of.h"
45 * When we disable a timer, we need to wait at least for 2 cycles of
46 * the timer source clock. We will use for that the clocksource timer
54 while ((old - readl(base + TIMER_CNTVAL_REG(1))) < TIMER_SYNC_TICKS) in sun4i_clkevt_sync()
58 static void sun4i_clkevt_time_stop(void __iomem *base, u8 timer) in sun4i_clkevt_time_stop() argument
60 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()
61 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()
65 static void sun4i_clkevt_time_setup(void __iomem *base, u8 timer, in sun4i_clkevt_time_setup() argument
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun4i.c6 * Based on sun4i Linux kernel sources mach-sunxi/pm/standby/dram*.c
7 * and earlier U-Boot Allwiner A10 SPL work
9 * (C) Copyright 2007-2012
14 * SPDX-License-Identifier: GPL-2.0+
28 #include <asm/arch/timer.h>
65 struct sunxi_timer_reg *timer = in mctl_ddr3_reset() local
69 writel(0, &timer->cpu_cfg); in mctl_ddr3_reset()
70 reg_val = readl(&timer->cpu_cfg); in mctl_ddr3_reset()
74 setbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
76 clrbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
[all …]
/OK3568_Linux_fs/kernel/drivers/input/serio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
113 This driver provides support for the PS/2 ports on PA-RISC machines
130 The SDC itself contains a 10ms resolution timer/clock capable
131 of delivering interrupts on a periodic and one-shot basis.
132 The SDC may also be connected to a battery-backed real-time
133 clock, a basic audio waveform generator, and an HP-HIL Master
198 echo -n "serio_raw" > /sys/bus/serio/devices/serioX/drvctl
230 When used for the E3 mailboard, a non-standard key table
267 tristate "OLPC AP-SP input support"
271 in the OLPC XO-1.75 and XO-4 laptops.
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
14 compatible = "arm,cortex-a53";
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
20 #cooling-cells = <2>;
24 compatible = "arm,cortex-a53";
[all …]
/OK3568_Linux_fs/kernel/drivers/watchdog/
H A Dsunxi_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 #define DRV_NAME "sunxi-wdt"
60 * wdt_timeout_map maps the watchdog timer interval value in seconds to
86 void __iomem *wdt_base = sunxi_wdt->wdt_base; in sunxi_wdt_restart()
87 const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs; in sunxi_wdt_restart()
91 val = readl(wdt_base + regs->wdt_cfg); in sunxi_wdt_restart()
92 val &= ~(regs->wdt_reset_mask); in sunxi_wdt_restart()
93 val |= regs->wdt_reset_val; in sunxi_wdt_restart()
94 writel(val, wdt_base + regs->wdt_cfg); in sunxi_wdt_restart()
97 val = readl(wdt_base + regs->wdt_mode); in sunxi_wdt_restart()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/sunxi-ng/
H A Dccu-sun4i-a10.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
26 #include "ccu-sun4i-a10.h"
36 .hw.init = CLK_HW_INIT("pll-core",
48 * With sigma-delta modulation for fractional-N on the audio PLL,
71 .hw.init = CLK_HW_INIT("pll-audio-base",
89 .hw.init = CLK_HW_INIT("pll-video0",
104 .hw.init = CLK_HW_INIT("pll-ve",
117 .hw.init = CLK_HW_INIT("pll-ve",
130 .hw.init = CLK_HW_INIT("pll-ddr-base",
[all …]

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