| /utopia/UTPA2-700.0.x/modules/demodulator/drv/demod/ |
| H A D | drvDMD_INTERN_DVBT2_v2.c | 574 MS_U8 u8TSClk; in DMD_DVBT2_SetSerialControl() local
588 u8TSClk = _sDMD_DVBT2_InitData.u8DMD_DVBT2_InitExt[2]; // TS_CLK in DMD_DVBT2_SetSerialControl()
592 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT2_SetSerialControl()
597 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT2_SetSerialControl()
599 bRet=INTERN_DVBT2_Serial_Control(bEnable, u8TSClk); in DMD_DVBT2_SetSerialControl()
619 MS_U8 u8TSClk; in DMD_DVBT2_SetConfig() local
633 u8TSClk = _sDMD_DVBT2_InitData.u8DMD_DVBT2_InitExt[2]; // TS_CLK in DMD_DVBT2_SetConfig()
637 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT2_SetConfig()
642 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT2_SetConfig()
645 bRet=INTERN_DVBT2_Config(BW, bSerialTS, u8TSClk, u32DMD_DVBT2_IfFrequency, u8PlpID); in DMD_DVBT2_SetConfig()
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| H A D | drvDMD_INTERN_DVBS_v2.c | 838 MS_U8 u8TSClk; in DMD_DVBS_SetSerialControl() local
852 u8TSClk = _sDMD_DVBS_InitData.u8DMD_DVBS_InitExt[2]; in DMD_DVBS_SetSerialControl()
856 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBS_SetSerialControl()
861 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBS_SetSerialControl()
863 bRet=INTERN_DVBS_Serial_Control(bEnable, u8TSClk); in DMD_DVBS_SetSerialControl()
872 MS_U8 u8TSClk; in DMD_DVBS_BlindScan_Config_symbol_rate_list() local
888 u8TSClk = _sDMD_DVBS_InitData.u8DMD_DVBS_InitExt[2]; in DMD_DVBS_BlindScan_Config_symbol_rate_list()
892 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBS_BlindScan_Config_symbol_rate_list()
897 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBS_BlindScan_Config_symbol_rate_list()
899 …lindScan_Config(u32SymbolRate, eQamMode, u32IFFreq, bSpecInv, bSerialTS, u8TSClk, pu16_symbol_rate… in DMD_DVBS_BlindScan_Config_symbol_rate_list()
[all …]
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| H A D | drvDMD_INTERN_DVBT2.c | 674 MS_U8 u8TSClk; in MDrv_DMD_DVBT2_SetSerialControl()
688 u8TSClk = _sDMD_DVBT2_InitData.u8DMD_DVBT2_InitExt[2]; // TS_CLK in MDrv_DMD_DVBT2_SetSerialControl()
692 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in MDrv_DMD_DVBT2_SetSerialControl()
697 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in MDrv_DMD_DVBT2_SetSerialControl()
699 bRet=INTERN_DVBT2_Serial_Control(bEnable, u8TSClk); in MDrv_DMD_DVBT2_SetSerialControl()
746 MS_U8 u8TSClk; in MDrv_DMD_DVBT2_SetConfig()
760 u8TSClk = _sDMD_DVBT2_InitData.u8DMD_DVBT2_InitExt[2]; // TS_CLK in MDrv_DMD_DVBT2_SetConfig()
764 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in MDrv_DMD_DVBT2_SetConfig()
769 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in MDrv_DMD_DVBT2_SetConfig()
772 bRet=INTERN_DVBT2_Config(BW, bSerialTS, u8TSClk, u32DMD_DVBT2_IfFrequency, u8PlpID); in MDrv_DMD_DVBT2_SetConfig()
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| H A D | drvDMD_INTERN_DVBT_v2.c | 858 MS_U8 u8TSClk; in DMD_DVBT_SetSerialControl() local
874 u8TSClk = _sDMD_DVBT_InitData.u8DMD_DVBT_InitExt[2]; // TS_CLK in DMD_DVBT_SetSerialControl()
878 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT_SetSerialControl()
883 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT_SetSerialControl()
885 bRet=INTERN_DVBT_Serial_Control(bEnable, u8TSClk); in DMD_DVBT_SetSerialControl()
909 MS_U8 u8TSClk; in DMD_DVBT_SetConfigHPLPSetIF() local
925 u8TSClk = _sDMD_DVBT_InitData.u8DMD_DVBT_InitExt[2]; // TS_CLK in DMD_DVBT_SetConfigHPLPSetIF()
929 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT_SetConfigHPLPSetIF()
934 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBT_SetConfigHPLPSetIF()
937 bRet=INTERN_DVBT_Config(BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap); in DMD_DVBT_SetConfigHPLPSetIF()
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| H A D | drvDMD_INTERN_DVBC_v2.c | 891 MS_U8 u8TSClk; in DMD_DVBC_SetSerialControl() local
907 u8TSClk = _sDMD_DVBC_InitData.u8DMD_DVBC_InitExt[2]; in DMD_DVBC_SetSerialControl()
911 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBC_SetSerialControl()
916 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBC_SetSerialControl()
918 bRet=INTERN_DVBC_Serial_Control(bEnable, u8TSClk); in DMD_DVBC_SetSerialControl()
933 MS_U8 u8TSClk; in DMD_DVBC_SetConfig_symbol_rate_list() local
980 u8TSClk = _sDMD_DVBC_InitData.u8DMD_DVBC_InitExt[2]; in DMD_DVBC_SetConfig_symbol_rate_list()
984 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBC_SetConfig_symbol_rate_list()
989 u8TSClk = 0xFF; // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.26MHz //@@++-- in DMD_DVBC_SetConfig_symbol_rate_list()
991 …bRet=INTERN_DVBC_Config(u16SymbolRate, eQamMode, u32IFFreq, bSpecInv, bSerialTS, u8TSClk, pu16_sym… in DMD_DVBC_SetConfig_symbol_rate_list()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1333 MS_BOOL INTERN_DVBC_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBC_Serial_Control() argument
1337 DBG_INTERN_DVBC(ULOGD("Utopia"," @INTERN_DVBC_ts... u8TSClk=%d\n", u8TSClk)); in INTERN_DVBC_Serial_Control()
1339 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Serial_Control()
1387 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBC_Serial_Control()
1468 …E eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS_U16 *pu16_sym… in INTERN_DVBC_Config() argument
1482 …Inv=%d, bSerialTS=%d, u8TSClk=%d\n",u16SymbolRate,eQamMode,u32IFFreq,bSpecInv,bSerialTS, u8TSClk)); in INTERN_DVBC_Config()
1485 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Config()
1618 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.2… in INTERN_DVBC_Config()
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| H A D | halDMD_INTERN_DVBT.c | 1394 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1398 DBG_INTERN_DVBT(ULOGD("Utopia"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1401 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1442 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1510 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1515 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1518 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1137 MS_BOOL INTERN_DVBC_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBC_Serial_Control() argument
1141 DBG_INTERN_DVBC(printf(" @INTERN_DVBC_ts... u8TSClk=%d\n", u8TSClk)); in INTERN_DVBC_Serial_Control()
1145 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Serial_Control()
1192 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBC_Serial_Control()
1271 …E eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS_U16 *pu16_sym… in INTERN_DVBC_Config() argument
1285 …Inv=%d, bSerialTS=%d, u8TSClk=%d\n",u16SymbolRate,eQamMode,u32IFFreq,bSpecInv,bSerialTS, u8TSClk)); in INTERN_DVBC_Config()
1288 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Config()
1385 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.2… in INTERN_DVBC_Config()
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| H A D | halDMD_INTERN_DVBT.c | 1073 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1077 DBG_INTERN_DVBT(printf(" @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1081 if (u8TSClk == 0xFF) u8TSClk=0x17; in INTERN_DVBT_Serial_Control()
1110 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1164 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1168 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1171 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| H A D | halDMD_INTERN_DVBT2.c | 1230 MS_BOOL INTERN_DVBT2_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT2_Serial_Control() argument
1234 DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT2_Serial_Control()
1236 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT2_Serial_Control()
1266 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT2_Serial_Control()
1323 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1328 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1331 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1389 MS_BOOL INTERN_DVBC_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBC_Serial_Control() argument
1393 DBG_INTERN_DVBC(printf(" @INTERN_DVBC_ts... u8TSClk=%d\n", u8TSClk)); in INTERN_DVBC_Serial_Control()
1395 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Serial_Control()
1443 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBC_Serial_Control()
1524 …E eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS_U16 *pu16_sym… in INTERN_DVBC_Config() argument
1541 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Config()
1638 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.2… in INTERN_DVBC_Config()
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| H A D | halDMD_INTERN_DVBT.c | 1410 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1414 DBG_INTERN_DVBT(printf(" @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1417 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1458 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1526 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1531 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1534 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| H A D | halDMD_INTERN_DVBT2.c | 1273 MS_BOOL INTERN_DVBT2_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT2_Serial_Control() argument
1277 DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT2_Serial_Control()
1279 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT2_Serial_Control()
1309 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT2_Serial_Control()
1366 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1371 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1374 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT2_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1343 MS_BOOL INTERN_DVBC_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBC_Serial_Control() argument
1347 ULOGD("DEMOD"," @INTERN_DVBC_ts... u8TSClk=%d\n", u8TSClk); in INTERN_DVBC_Serial_Control()
1349 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Serial_Control()
1397 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBC_Serial_Control()
1478 …E eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS_U16 *pu16_sym… in INTERN_DVBC_Config() argument
1495 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Config()
1628 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.2… in INTERN_DVBC_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1324 MS_BOOL INTERN_DVBC_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBC_Serial_Control() argument
1328 ULOGD("DEMOD"," @INTERN_DVBC_ts... u8TSClk=%d\n", u8TSClk); in INTERN_DVBC_Serial_Control()
1330 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Serial_Control()
1378 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBC_Serial_Control()
1459 …E eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS_U16 *pu16_sym… in INTERN_DVBC_Config() argument
1476 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBC_Config()
1609 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.2… in INTERN_DVBC_Config()
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| H A D | halDMD_INTERN_DVBT.c | 1397 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1401 DBG_INTERN_DVBT(printf(" @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1403 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1444 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1512 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1517 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1520 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
1591 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.2… in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1171 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1175 DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1178 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1219 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1287 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1292 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1295 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1192 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1196 DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1199 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1240 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1308 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1313 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1316 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1171 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1175 DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1178 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1219 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1287 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1292 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1295 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1171 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1175 DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1178 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1219 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1287 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1292 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1295 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1171 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1175 DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1178 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1219 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1287 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1292 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1295 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1171 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1175 DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1178 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1219 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1287 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1292 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1295 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1171 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1175 DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT_Serial_Control()
1178 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1219 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1287 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1292 …DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1295 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1192 MS_BOOL INTERN_DVBT_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT_Serial_Control() argument
1196 ULOGD("DEMOD"," @INTERN_DVBT_ts... u8TSClk=%d\n",u8TSClk); in INTERN_DVBT_Serial_Control()
1199 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Serial_Control()
1240 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT_Serial_Control()
1308 …L_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U8 u8TSClk, MS_U32 u32IFFreq… in INTERN_DVBT_Config() argument
1313 …N_DVBT_config %d %d %d %d %d %d %d %d\n", BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FS… in INTERN_DVBT_Config()
1316 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT_Config()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 1282 MS_BOOL INTERN_DVBT2_Serial_Control(MS_BOOL bEnable, MS_U8 u8TSClk) in INTERN_DVBT2_Serial_Control() argument
1286 DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_ts... u8TSClk=%d\n",u8TSClk)); in INTERN_DVBT2_Serial_Control()
1288 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT2_Serial_Control()
1318 …HAL_DMD_RIU_WriteByte(0x103300, u8TSClk); // parallel mode: 0x0513 => ts_clk=288/(2*(0x16+1))=6.… in INTERN_DVBT2_Serial_Control()
1375 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1380 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1383 if (u8TSClk == 0xFF) u8TSClk=0x13; in INTERN_DVBT2_Config()
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