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Searched refs:u32HVD_STREAM_CMDQ_WD (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/vpu_v3/
H A DhalVPU_EX.c3765 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
3784 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
3819 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3832 …if(cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE) >= HVD_CMDQ_DR… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3833 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3835 … cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h440 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DhalVPU_EX.c3905 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
3924 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
3959 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3973 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3975 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3976 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h444 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/vpu_v3/
H A DhalVPU_EX.c4090 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4109 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4144 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4158 …if(cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE) >= HVD_CMDQ_DR… in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4159 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4161 … cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h452 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DhalVPU_EX.c4087 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4106 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4141 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4155 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4157 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4158 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h440 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DhalVPU_EX.c4039 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4058 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4093 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4107 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4109 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4110 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h348 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DhalVPU_EX.c3906 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
3925 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
3960 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3974 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3976 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
3977 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h318 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DhalVPU_EX.c3967 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
3986 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4021 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4035 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4037 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4038 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h440 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DhalVPU_EX.c4351 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4370 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4405 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4419 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4421 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4422 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h444 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DhalVPU_EX.c4369 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4388 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4423 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4437 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4439 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4440 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h444 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DhalVPU_EX.c4514 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4533 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4568 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4582 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4584 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4585 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A DhalVPU_EX.c4517 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4536 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4571 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4585 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4587 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4588 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DhalVPU_EX.c4524 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4543 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4578 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4592 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4594 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4595 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DhalVPU_EX.c4510 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4529 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4564 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4578 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4580 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4581 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
H A Dcontroller.h440 …unsigned int u32HVD_STREAM_CMDQ_WD; //0x0FBC // stream command queue write ptr for VDEC3 dra… member
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DhalVPU_EX.c4537 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4556 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4591 …G1(pVPUHalContext->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4605 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4607 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4608 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DhalVPU_EX.c4385 return cmd_q->u32HVD_STREAM_CMDQ_WD == cmd_q->u32HVD_STREAM_CMDQ_RD; in HAL_VPU_EX_DRAMCMDQueueIsEmpty()
4404 …MS_U32 NewWD = cmd_q->u32HVD_STREAM_CMDQ_WD + (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); /… in HAL_VPU_EX_DRAMCMDQueueIsFull()
4441 …_PA2KSEG1(pVPUCtx->u32FWCodeAddr + cmd_q->u32HVD_CMDQ_DRAM_ST_ADDR + cmd_q->u32HVD_STREAM_CMDQ_WD); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4455 cmd_q->u32HVD_STREAM_CMDQ_WD += (HVD_DRAM_CMDQ_CMD_SIZE + HVD_DRAM_CMDQ_ARG_SIZE); in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4457 if (cmd_q->u32HVD_STREAM_CMDQ_WD == HVD_CMDQ_DRAM_ST_SIZE) in HAL_VPU_EX_DRAMStreamCMDQueueSend()
4458 cmd_q->u32HVD_STREAM_CMDQ_WD = 0; in HAL_VPU_EX_DRAMStreamCMDQueueSend()

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