| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1315 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1319 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1320 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1322 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1323 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1324 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1325 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1326 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1379 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1387 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1440 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1453 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1454 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1489 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1490 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1519 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1525 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1526 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1572 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1589 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1774 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1778 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1779 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1781 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1782 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1783 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1784 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1785 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1838 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1846 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1780 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1793 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1794 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1829 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1830 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1859 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1865 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1866 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1912 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1930 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1638 MS_U8 reg_frz = 0, reg_frza = 0; in INTERN_DVBC_Active() local 1653 MDrv_SYS_DMD_VD_MBX_ReadDSPReg(E_DMD_DVBC_PARAM_VERSION, ®_frz); in INTERN_DVBC_Active() 1654 ULOGD("DEMOD","##########DVBC------>(Driver) = 0x%x #########\n" , reg_frz); in INTERN_DVBC_Active() 1657 if (reg_frz < reg_frza) in INTERN_DVBC_Active() 1760 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1764 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1765 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1767 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1768 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1769 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1783 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1796 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1797 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1832 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1833 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1862 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1868 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1869 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1915 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1932 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1513 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1517 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1518 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1520 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1521 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1522 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1523 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1524 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1577 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1585 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1394 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1407 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1408 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1443 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1444 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1473 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1479 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1480 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1526 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1543 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1319 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1323 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1324 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1326 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1327 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1328 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1329 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1330 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1383 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1391 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1446 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1459 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1460 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1495 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1496 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1525 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1531 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1532 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1578 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1595 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1368 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1372 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1373 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1375 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1376 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1377 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1378 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1379 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1431 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1439 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1368 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1372 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1373 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1375 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1376 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1377 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1378 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1379 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1431 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1439 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1541 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1555 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1556 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1591 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1592 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1619 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1625 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1626 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1672 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1690 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1418 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1422 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1423 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1425 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1426 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1427 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1428 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1429 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1481 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1489 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1368 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1372 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1373 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1375 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1376 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1377 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1378 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1379 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1431 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1439 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1418 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1422 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1423 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1425 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1426 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1427 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1428 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1429 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1481 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1489 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1640 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1654 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1655 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1690 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1691 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1717 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1723 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1724 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1770 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1788 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1368 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1372 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1373 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1375 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1376 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1377 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1378 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1379 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1431 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1439 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1541 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1555 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1556 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1591 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1592 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1619 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1625 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1626 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1672 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1690 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 1368 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 1372 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 1373 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 1375 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 1376 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 1377 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1378 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DE, ®_frz); in INTERN_DVBC_GetLock() 1379 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() 1431 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBC_GetPostViterbiBer() local 1439 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBC_GetPostViterbiBer() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1541 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1555 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1556 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1591 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1592 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1619 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1625 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1626 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1672 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1690 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 2413 MS_U8 reg_frz = 0, reg_frza = 0; in INTERN_DVBC_Active() local 2433 MDrv_SYS_DMD_VD_MBX_ReadDSPReg(E_DMD_DVBC_PARAM_VERSION, ®_frz); in INTERN_DVBC_Active() 2434 DBG_INTERN_DVBC(ULOGD("DEMOD","##########DVBC------>(Driver) = 0x%x #########\n", reg_frz)); in INTERN_DVBC_Active() 2437 if (reg_frz < reg_frza) in INTERN_DVBC_Active() 2786 MS_U8 reg_frz=0, FSM=0; in INTERN_DVBC_GetLock() local 2790 MDrv_SYS_DMD_VD_MBX_ReadReg(TDF_REG_BASE + 0x03, ®_frz); in INTERN_DVBC_GetLock() 2791 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz | 0x80); in INTERN_DVBC_GetLock() 2793 MDrv_SYS_DMD_VD_MBX_WriteReg(TDF_REG_BASE + 0x03, reg_frz); in INTERN_DVBC_GetLock() 2794 MDrv_SYS_DMD_VD_MBX_ReadReg(0x20DF, ®_frz); in INTERN_DVBC_GetLock() 2795 u16Timer=(u16Timer<<8)+reg_frz; in INTERN_DVBC_GetLock() [all …]
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| H A D | halDMD_INTERN_DVBT.c | 1541 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1555 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1556 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1591 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1592 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1619 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1625 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1626 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1672 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1690 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1580 MS_U8 reg_frz = 0, reg_frza = 0; in INTERN_DVBT_Active() local 1596 MDrv_SYS_DMD_VD_MBX_ReadDSPReg(E_DMD_DVBT_N_PARAM_VERSION, ®_frz); in INTERN_DVBT_Active() 1597 ULOGD("DEMOD","##########DVBT------>(Driver) = 0x%x #########\n",reg_frz); in INTERN_DVBT_Active() 1600 if (reg_frz < reg_frza) in INTERN_DVBT_Active() 1777 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1790 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1791 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1826 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1827 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1856 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/ |
| H A D | halDMD_INTERN_DVBT.c | 1750 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPostViterbiBer() local 1763 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(BACKEND_REG_BASE+0x03, ®_frz); in INTERN_DVBT_GetPostViterbiBer() 1764 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz|0x03); in INTERN_DVBT_GetPostViterbiBer() 1799 reg_frz=reg_frz&(~0x03); in INTERN_DVBT_GetPostViterbiBer() 1800 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(BACKEND_REG_BASE+0x03, reg_frz); in INTERN_DVBT_GetPostViterbiBer() 1829 MS_U8 reg=0, reg_frz=0; in INTERN_DVBT_GetPreViterbiBer() local 1835 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FEC_REG_BASE + 0x10, ®_frz); in INTERN_DVBT_GetPreViterbiBer() 1836 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz|0x08); in INTERN_DVBT_GetPreViterbiBer() 1882 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FEC_REG_BASE + 0x10, reg_frz); in INTERN_DVBT_GetPreViterbiBer() 1899 MS_U8 reg = 0, reg_frz = 0; in INTERN_DVBT_GetPacketErr() local [all …]
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