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Searched refs:TOP_CKG_HVD_384MHZ (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h488 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c3910 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3967 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h489 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4066 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4109 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h505 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4040 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4083 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h489 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c3951 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4008 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h490 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4001 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4058 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h488 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) macro
H A DhalHVD_EX.c3905 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DregHVD_EX.h505 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4061 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4104 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h489 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4088 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4131 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DregHVD_EX.h493 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4248 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4264 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h517 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) macro
H A DhalHVD_EX.c4004 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4061 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DregHVD_EX.h640 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4949 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4961 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DregHVD_EX.h640 #define TOP_CKG_HVD_384MHZ BITS(4:2, 0) // default use this macro
H A DhalHVD_EX.c4934 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4946 _HVD_WriteWordMask(REG_TOP_HVD, TOP_CKG_HVD_384MHZ, TOP_CKG_HVD_CLK_MASK); in HAL_HVD_EX_PowerCtrl()