| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/ |
| H A D | halHVD_EX.c | 3957 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
3963 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3968 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3973 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3978 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3983 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3988 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3993 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3998 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4005 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 524 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/ |
| H A D | halHVD_EX.c | 3877 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3884 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3898 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_320MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3907 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3915 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3923 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3931 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3939 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3947 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3955 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 507 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/ |
| H A D | halHVD_EX.c | 3882 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3889 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3903 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_320MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3912 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3920 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3928 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3936 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3944 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3952 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3960 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 507 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/ |
| H A D | halHVD_EX.c | 3976 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3983 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3997 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_320MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4006 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4014 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4022 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4030 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4038 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4046 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4054 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 536 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/ |
| H A D | halHVD_EX.c | 3923 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3930 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3944 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_320MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3953 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3961 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3969 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3977 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3985 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
3993 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4001 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 508 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/ |
| H A D | halHVD_EX.c | 3973 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3980 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
3994 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_320MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4003 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4011 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4019 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4027 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4035 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4043 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4051 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 509 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/ |
| H A D | halHVD_EX.c | 4005 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
4011 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4016 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4021 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4026 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4031 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4036 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4041 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4046 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4053 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 508 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/ |
| H A D | halHVD_EX.c | 3978 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
3984 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3989 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3994 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3999 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4004 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4009 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4014 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4019 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4026 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 524 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/ |
| H A D | halHVD_EX.c | 3983 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
3989 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3994 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
3999 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4004 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4009 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4014 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4019 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_216MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4024 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4031 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
[all …]
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| H A D | regHVD_EX.h | 508 #define REG_TOP_HVD_AEC (CLKGEN0_REG_BASE+(0x0034<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/ |
| H A D | halHVD_EX.c | 4221 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
4227 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_HVD_EX_PowerCtrl()
4241 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_320MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4250 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4258 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
4266 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_HVD_EX_PowerCtrl()
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| H A D | regHVD_EX.h | 615 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/ |
| H A D | halHVD_EX.c | 4876 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
4882 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4887 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4892 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4899 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
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| H A D | regHVD_EX.h | 734 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/ |
| H A D | halHVD_EX.c | 4891 _HVD_WriteWordMask(REG_TOP_HVD_AEC, ~TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
4897 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4902 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_240MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4907 … _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_288MHZ, TOP_CKG_HVD_AEC_CLK_MASK); in HAL_AEC_PowerCtrl()
4914 _HVD_WriteWordMask(REG_TOP_HVD_AEC, TOP_CKG_HVD_AEC_DIS, TOP_CKG_HVD_AEC_DIS); in HAL_AEC_PowerCtrl()
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| H A D | regHVD_EX.h | 734 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1)) macro
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| /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/ |
| H A D | regHVD_EX.h | 737 #define REG_TOP_HVD_AEC (CLKGEN2_REG_BASE+(0x001b<<1)) macro
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