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Searched refs:MOD_A_W2BYTEMSK (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/macan/pnl/
H A DhalPNL.c204 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
211 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
212 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
220 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
259 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
262 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
263 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
266 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
274 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_MOD_PowerOn()
278 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_MOD_PowerOn()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/pnl/
H A DhalPNL.c195 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
204 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0) , BIT(0)); in MHal_MOD_PowerOn()
208 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
210 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
218 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
271 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
274 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
275 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
278 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
286 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_MOD_PowerOn()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/
H A DhalPNL.c1022 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_10_L, 0x00, BIT(4)); //reg_ck1x_4dig_phsel_path2 in MHal_MOD_PowerOn()
1029 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_01_L, BIT(1) , BIT(1)); //reg_gcr_en_reg: enable clk tree pwr in MHal_MOD_PowerOn()
1030 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_01_L, 0x00 , BIT(0)); //reg_pd_ib_mod: power down mod atop in MHal_MOD_PowerOn()
1043 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, u16ChannelClk_En, 0x001F); in MHal_MOD_PowerOn()
1048 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_76_L, 0x0400, 0x0FFF); in MHal_MOD_PowerOn()
1049 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_6F_L, 0x0444, 0x0FFF); in MHal_MOD_PowerOn()
1054 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_76_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
1055 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_6F_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
1059 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_76_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
1060 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_6F_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/
H A DhalPNL.c1026 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_10_L, 0x00, BIT(4)); //reg_ck1x_4dig_phsel_path2 in MHal_MOD_PowerOn()
1033 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_01_L, BIT(1) , BIT(1)); //reg_gcr_en_reg: enable clk tree pwr in MHal_MOD_PowerOn()
1034 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_01_L, 0x00 , BIT(0)); //reg_pd_ib_mod: power down mod atop in MHal_MOD_PowerOn()
1047 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, u16ChannelClk_En, 0x001F); in MHal_MOD_PowerOn()
1052 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_76_L, 0x0400, 0x0FFF); in MHal_MOD_PowerOn()
1053 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_6F_L, 0x0444, 0x0FFF); in MHal_MOD_PowerOn()
1058 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_76_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
1059 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_6F_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
1063 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_76_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
1064 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_6F_L, 0x0000, 0x0FFF); in MHal_MOD_PowerOn()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/pnl/
H A DhalPNL.c165 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
172 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
173 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
181 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
220 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
223 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
224 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
227 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
235 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_MOD_PowerOn()
238 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_MOD_PowerOn()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/
H A DhalPNL.c196 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
205 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0) , BIT(0)); in MHal_MOD_PowerOn()
209 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
211 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
219 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
272 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
275 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
276 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
279 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
287 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_MOD_PowerOn()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/
H A DhalPNL.c196 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
205 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0) , BIT(0)); in MHal_MOD_PowerOn()
209 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
211 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
219 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
272 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
275 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
276 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
279 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
287 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_MOD_PowerOn()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/pnl/
H A DhalPNL.c183 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
190 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
191 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
194 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0x1C, 0x1C); in MHal_MOD_PowerOn()
195 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
222 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
225 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
226 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
229 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
272 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/pnl/
H A DhalPNL.c183 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
190 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
191 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
194 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0x1C, 0x1C); in MHal_MOD_PowerOn()
195 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
222 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
225 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
226 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
229 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
272 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/
H A Dxc_hwreg_utility2.h601 #define MOD_A_W2BYTEMSK( u32Reg, u16Val, u16Mask)\ macro
/utopia/UTPA2-700.0.x/modules/xc/drv/pnl/include/
H A Dpnl_hwreg_utility2.h2454 #define MOD_A_W2BYTEMSK( u32Reg, u16Val, u16Mask)\ macro