Lines Matching refs:MOD_A_W2BYTEMSK
183 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
190 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
191 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
194 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0x1C, 0x1C); in MHal_MOD_PowerOn()
195 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
222 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
225 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
226 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
229 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
272 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
277 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
287 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
338 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0x1F, 0x1F); //open all clk in _MHal_PNL_Set_Clk()
431 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, u8Clk, 0x1F); in _MHal_PNL_Set_Clk()
436 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0x1F, 0x1F); in _MHal_PNL_Set_Clk()
1117 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, 0, BIT(15)); in MHal_PNL_PreSetModeOn()
1121 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, BIT(15), BIT(15)); in MHal_PNL_PreSetModeOn()
1372 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x00, BIT(15)); // disable keep mode in MHal_PNL_MOD_Control_Out_Swing()
1432 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_18_L, in MHal_PNL_MOD_PECurrent_Setting()
1442 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_19_L, in MHal_PNL_MOD_PECurrent_Setting()
1452 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_1A_L, in MHal_PNL_MOD_PECurrent_Setting()
1462 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_1B_L, in MHal_PNL_MOD_PECurrent_Setting()
1481 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_34_L, 0xFFFF, 0xFFFF); //Enable TTL low-power mode in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1484 … MOD_A_W2BYTEMSK(REG_MOD_A_BK00_32_L, 0xFFFF, 0xFFFF); //GCR_EN_RINT (internal termination open) in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1487 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3C_L, 0xFFFF, 0xFFFF); //Disable DRIVER BIAS OP in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1492 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_34_L, 0x0000, 0xFFFF); //Disable TTL low-power mode in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1495 … MOD_A_W2BYTEMSK(REG_MOD_A_BK00_32_L, 0x0000, 0xFFFF); //GCR_EN_RINT (internal termination close) in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1498 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3C_L, 0x0000, 0xFFFF); //Enable DRIVER BIAS OP in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1561 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0, BIT(15)); in msSetVBY1RconValue()
1600 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_PNL_SetOutputType()
1603 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_PNL_SetOutputType()
1614 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, 0x3FF, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
1623 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0xC01F , 0xFFFF); // enable clk_dot_mini_pre_osd & clk_dot_mi… in MHal_PNL_SetOutputType()
1625 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, BIT(15), BIT(15)); //[15]sw_rst in MHal_PNL_SetOutputType()
1626 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0xC000 , 0xF000); // enable clk_dot_mini_pre_osd & clk_dot_mi… in MHal_PNL_SetOutputType()
1635 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_PNL_SetOutputType()
1638 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_PNL_SetOutputType()
1649 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_40_L, 0x0FFF, 0x0FFF); in MHal_PNL_SetOutputType()
1651 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_48_L, 0x0FFF, 0x0FFF); in MHal_PNL_SetOutputType()
1653 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_44_L, 0x0000, 0x0FFF); in MHal_PNL_SetOutputType()
1655 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_42_L, 0x0000, 0x0FFF); in MHal_PNL_SetOutputType()
1658 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_40_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
1661 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_48_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
1664 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_44_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1667 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_42_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1682 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0, 0xF000); in MHal_PNL_SetOutputType()
1690 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_48_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1695 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_PNL_SetOutputType()
1696 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_PNL_SetOutputType()
1728 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_40_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1732 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, 0x000, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
2059 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, BIT(15), BIT(15)); in msModCurrentCalibration()
2063 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x0009, 0x00FF); // reg_hw_cal_wait in msModCurrentCalibration()
2066 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x0500, 0x0F00); in msModCurrentCalibration()
2069 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_70_L, pPNLResourcePrivate->sthalPNL._u8MOD_CALI_TARGET, BIT(2)|BIT(… in msModCurrentCalibration()
2076 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_70_L, BIT(7), BIT(7)); // Enable calibration function in msModCurrentCalibration()
2079 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_73_L, BIT(15), BIT(15)); in msModCurrentCalibration()
2110 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x00, BIT(15)); // disable keep mode in msModCurrentCalibration()
2284 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x00, BIT(15)); // disable keep mode in msModCurrentCalibration()
2300 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_70_L, 0x00, BIT(7)); // Diable Hardware calibration in msModCurrentCalibration()
2947 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
2948 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(0), BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
2950 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0 , BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
2951 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(1), BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
2953 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()
2959 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(2)|BIT(3), BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()
2968 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
2969 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(0), BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
2971 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0 , BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
2972 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(1), BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
2974 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()
2979 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(2)|BIT(3), BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()