Lines Matching refs:MOD_A_W2BYTEMSK
165 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
172 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00 , BIT(0)); in MHal_MOD_PowerOn()
173 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(8) , BIT(8)); in MHal_MOD_PowerOn()
181 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
220 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_39_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
223 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, BIT(0), BIT(0)); //analog MOD po… in MHal_MOD_PowerOn()
224 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
227 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0, (BIT(1) | BIT(0) )); //enable ib… in MHal_MOD_PowerOn()
235 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_MOD_PowerOn()
238 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_MOD_PowerOn()
277 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
282 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
292 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0x5550, 0xFFF0); in MHal_Output_LVDS_Pair_Setting()
1380 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, 0, BIT(15)); in MHal_PNL_PreSetModeOn()
1384 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, BIT(15), BIT(15)); in MHal_PNL_PreSetModeOn()
1645 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0, BIT(15)); in MHal_PNL_MOD_Control_Out_Swing()
1659 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_23_L, (u16ValidSwing << 4 | u16ValidSwing), 0x00ff); in MHal_PNL_MOD_Control_Out_Swing()
1730 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_18_L, in MHal_PNL_MOD_PECurrent_Setting()
1740 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_19_L, in MHal_PNL_MOD_PECurrent_Setting()
1750 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_1A_L, in MHal_PNL_MOD_PECurrent_Setting()
1760 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_1B_L, in MHal_PNL_MOD_PECurrent_Setting()
1779 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_34_L, 0xFFFF, 0xFFFF); //Enable TTL low-power mode in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1782 … MOD_A_W2BYTEMSK(REG_MOD_A_BK00_32_L, 0xFFFF, 0xFFFF); //GCR_EN_RINT (internal termination open) in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1785 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3C_L, 0xFFFF, 0xFFFF); //Disable DRIVER BIAS OP in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1790 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_34_L, 0x0000, 0xFFFF); //Disable TTL low-power mode in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1793 … MOD_A_W2BYTEMSK(REG_MOD_A_BK00_32_L, 0x0000, 0xFFFF); //GCR_EN_RINT (internal termination close) in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1796 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3C_L, 0x0000, 0xFFFF); //Enable DRIVER BIAS OP in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1859 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0, BIT(15)); in msSetVBY1RconValue()
1898 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_PNL_SetOutputType()
1901 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_PNL_SetOutputType()
1912 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, 0x3FF, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
1963 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_PNL_SetOutputType()
1966 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_PNL_SetOutputType()
2024 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0xC01F , 0xFFFF); // enable clk_dot_mini_pre_osd & clk_dot_mi… in MHal_PNL_SetOutputType()
2026 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, BIT(15), BIT(15)); //[15]sw_rst in MHal_PNL_SetOutputType()
2027 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0xC000 , 0xF000); // enable clk_dot_mini_pre_osd & clk_dot_mi… in MHal_PNL_SetOutputType()
2036 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0020,0x0020); in MHal_PNL_SetOutputType()
2039 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3B_L, 0x0000,0x0020); in MHal_PNL_SetOutputType()
2050 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_40_L, 0x0FFF, 0x0FFF); in MHal_PNL_SetOutputType()
2052 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_48_L, 0x0FFF, 0x0FFF); in MHal_PNL_SetOutputType()
2054 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_44_L, 0x0000, 0x0FFF); in MHal_PNL_SetOutputType()
2056 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_42_L, 0x0000, 0x0FFF); in MHal_PNL_SetOutputType()
2059 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_40_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
2062 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_48_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
2065 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_44_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
2068 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_42_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
2083 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_00_L, 0, 0xF000); in MHal_PNL_SetOutputType()
2091 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_48_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
2096 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0x00, BIT(0)); in MHal_PNL_SetOutputType()
2126 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_40_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
2130 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, 0x000, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
2310 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_30_L, 0x3FFF, 0x3FFF); //reg_gcr_pe_en_ch in MHal_PNL_Init_MOD()
2311 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_32_L, 0x0000, 0x3FFF); //reg_gcr_en_rint_ch in MHal_PNL_Init_MOD()
2312 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3C_L, 0x3FFF, 0x3FFF); //reg_gcr_test_ch in MHal_PNL_Init_MOD()
2354 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, 0x1F, 0x1F); //[4]ck_pd[3]ck_pc[2]ck_pb[1]ck_pa[0]en_ck … in MHal_PNL_Init_MOD()
2360 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_3A_L, 0xC000, 0xF000); //bank selection for skew clock in MHal_PNL_Init_MOD()
2373 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_31_L, 0x0FFF, 0x3FFF); in MHal_PNL_Init_MOD()
2561 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, BIT(15), BIT(15)); in msModCurrentCalibration()
2565 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x0000, 0x00FF); in msModCurrentCalibration()
2568 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x0500, 0x0F00); in msModCurrentCalibration()
2609 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_72_L, 0x00, BIT(15)); in msModCurrentCalibration()
3139 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_69_L, BIT(15), BIT(15)); //[15]sw_rst in MHal_PNL_SetOSDCOutputType()
3154 …MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, BIT(14),BIT(14)|BIT(15)); //[15]enskew_path2[14]enclk_path2[4… in MHal_PNL_SetOSDCOutputType()
3185 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_38_L, BIT(14) ,BIT(14)|BIT(15)); in MHal_PNL_SetOSDCOutputType()
3386 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
3387 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(0), BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
3393 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_79_L, 0, BIT(14)); in MHal_PNL_ChannelFIFOPointerADjust()
3394 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_79_L, BIT(14), BIT(14)); in MHal_PNL_ChannelFIFOPointerADjust()
3397 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0 , BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
3398 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(1), BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
3400 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()
3406 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(2)|BIT(3), BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()
3415 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
3416 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(0), BIT(0)); in MHal_PNL_ChannelFIFOPointerADjust()
3422 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_79_L, 0, BIT(14)); in MHal_PNL_ChannelFIFOPointerADjust()
3423 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_79_L, BIT(14), BIT(14)); in MHal_PNL_ChannelFIFOPointerADjust()
3426 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0 , BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
3427 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(1), BIT(1)); in MHal_PNL_ChannelFIFOPointerADjust()
3429 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, 0, BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()
3434 MOD_A_W2BYTEMSK(REG_MOD_A_BK00_5D_L, BIT(2)|BIT(3), BIT(2)|BIT(3)); in MHal_PNL_ChannelFIFOPointerADjust()