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Searched refs:HVD_REG_RESET_MIU1_128 (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DregHVD_EX.h241 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3486 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h241 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h242 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3502 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h242 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3463 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h242 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3538 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h242 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3579 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h241 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DregHVD_EX.h242 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3476 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h242 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3516 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DregHVD_EX.h254 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c3789 _HVD_WriteWordMask(HVD_REG_RESET, 0 , HVD_REG_RESET_MIU1_128); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h242 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DregHVD_EX.h246 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c4392 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU1_128 , HVD_REG_RESET_MIU1_128 ); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DregHVD_EX.h246 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c4377 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU1_128 , HVD_REG_RESET_MIU1_128 ); in HAL_HVD_EX_InitHW()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/
H A DregHVD_EX.h246 #define HVD_REG_RESET_MIU1_128 BIT(5) macro
H A DhalHVD_EX.c4514 _HVD_WriteWordMask(HVD_REG_RESET, HVD_REG_RESET_MIU1_128 , HVD_REG_RESET_MIU1_128 ); in HAL_HVD_EX_InitHW()