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/utopia/UTPA2-700.0.x/modules/demodulator/drv/demod/
H A DdrvDMD_INTERN_DVBT_v2.c890 MS_BOOL DMD_DVBT_SetConfig(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG) in DMD_DVBT_SetConfig() argument
894 …return MDrv_DMD_DVBT_SetConfigHPLPSetIF(BW, bSerialTS, bPalBG, 0, u32DMD_DVBT_IfFrequency, u32DMD_… in DMD_DVBT_SetConfig()
898 MS_BOOL DMD_DVBT_SetConfigHPLP(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_B… in DMD_DVBT_SetConfigHPLP() argument
902 …return MDrv_DMD_DVBT_SetConfigHPLPSetIF(BW, bSerialTS, bPalBG, bLPSel, u32DMD_DVBT_IfFrequency, u3… in DMD_DVBT_SetConfigHPLP()
906 MS_BOOL DMD_DVBT_SetConfigHPLPSetIF(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG,… in DMD_DVBT_SetConfigHPLPSetIF() argument
916 …ULOGD("DEMOD","MDrv_DMD_DVBT_SetConfigHPLPSetIF %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, … in DMD_DVBT_SetConfigHPLPSetIF()
937 bRet=INTERN_DVBT_Config(BW, bSerialTS, bPalBG, bLPSel, u8TSClk, u32IFFreq, u32FSFreq, u8IQSwap); in DMD_DVBT_SetConfigHPLPSetIF()
938 eDMD_DVBT_BandWidth=BW; in DMD_DVBT_SetConfigHPLPSetIF()
1424 …InstPri->fpDVBTSetConfigHPLPSetIF(((PDVBT_SetConfigHPLPSetIF_PARAM)pArgs)->BW, ((PDVBT_SetConfigHP… in DVBTIoctl()
H A DdrvDMD_INTERN_DVBT.c838 MS_BOOL MDrv_DMD_DVBT_SetConfig(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG) in MDrv_DMD_DVBT_SetConfig() argument
842 …return MDrv_DMD_DVBT_SetConfigHPLPSetIF(BW, bSerialTS, bPalBG, 0, u32DMD_DVBT_IfFrequency, u32DMD_… in MDrv_DMD_DVBT_SetConfig()
846 MS_BOOL MDrv_DMD_DVBT_SetConfigHPLP(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG,… in MDrv_DMD_DVBT_SetConfigHPLP() argument
850 …return MDrv_DMD_DVBT_SetConfigHPLPSetIF(BW, bSerialTS, bPalBG, bLPSel, u32DMD_DVBT_IfFrequency, u3… in MDrv_DMD_DVBT_SetConfigHPLP()
854 MS_BOOL MDrv_DMD_DVBT_SetConfigHPLPSetIF(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bP… in MDrv_DMD_DVBT_SetConfigHPLPSetIF() argument
858 Drv_DVBT_SetConfigHPLPSetIF_PARAM.BW=BW; in MDrv_DMD_DVBT_SetConfigHPLPSetIF()
H A DdrvDMD_INTERN_DVBT2_v2.c166 typedef MS_BOOL (*IOCTL_DVBT2_SetConfig)(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, …
615 MS_BOOL DMD_DVBT2_SetConfig(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8PlpID) in DMD_DVBT2_SetConfig() argument
624 printf("MDrv_DMD_DVBT2_SetConfig %d %d %d\n", BW, bSerialTS, u8PlpID); in DMD_DVBT2_SetConfig()
645 bRet=INTERN_DVBT2_Config(BW, bSerialTS, u8TSClk, u32DMD_DVBT2_IfFrequency, u8PlpID); in DMD_DVBT2_SetConfig()
646 eDMD_DVBT2_BandWidth=BW; in DMD_DVBT2_SetConfig()
1101 …bRet=psDVBT2InstPri->fpDVBT2_SetConfig(((PDVBT2_SETCONFIG_PARAM)pArgs)->BW,((PDVBT2_SETCONFIG_PARA… in DVBT2Ioctl()
H A DdrvDMD_INTERN_DVBT2.c726 MS_BOOL MDrv_DMD_DVBT2_SetConfig(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8PlpI… in MDrv_DMD_DVBT2_SetConfig() argument
730 Drv_DVBT2_SetConfig_PARAM.BW=BW; in MDrv_DMD_DVBT2_SetConfig()
751 printf("MDrv_DMD_DVBT2_SetConfig %d %d %d\n", BW, bSerialTS, u8PlpID); in MDrv_DMD_DVBT2_SetConfig()
772 bRet=INTERN_DVBT2_Config(BW, bSerialTS, u8TSClk, u32DMD_DVBT2_IfFrequency, u8PlpID); in MDrv_DMD_DVBT2_SetConfig()
773 eDMD_DVBT2_BandWidth=BW; in MDrv_DMD_DVBT2_SetConfig()
/utopia/UTPA2-700.0.x/mxlib/include/
H A DdrvDMD_INTERN_DVBT_v2.h238 DMD_RF_CHANNEL_BANDWIDTH BW; member
246 DMD_RF_CHANNEL_BANDWIDTH BW; member
255 DMD_RF_CHANNEL_BANDWIDTH BW; member
H A DdrvDMD_INTERN_DVBT.h645 extern MS_BOOL MDrv_DMD_DVBT_SetConfig(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPal…
649 extern MS_BOOL MDrv_DMD_DVBT_SetConfigHPLP(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL …
653 extern MS_BOOL MDrv_DMD_DVBT_SetConfigHPLPSetIF(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_…
/utopia/UTPA2-700.0.x/projects/tmplib/include/
H A DdrvDMD_INTERN_DVBT.h801 extern MS_BOOL MDrv_DMD_DVBT_SetConfigHPLP(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL …
819 extern MS_BOOL MDrv_DMD_DVBT_SetConfigHPLPSetIF(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_…
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBT2.c1323 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1328 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1332 switch(BW) in INTERN_DVBT2_Config()
1358 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1164 MS_BOOL INTERN_DVBT_Config ( DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOO… in INTERN_DVBT_Config() argument
1168 …DBG_INTERN_DVBT(printf(" @INTERN_DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, … in INTERN_DVBT_Config()
1172 switch(BW) in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/
H A DhalDMD_INTERN_DVBT2.c1366 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1371 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1375 switch(BW) in INTERN_DVBT2_Config()
1401 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBT2.c1375 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1380 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1384 switch(BW) in INTERN_DVBT2_Config()
1410 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1113 MS_BOOL INTERN_DVBT_Config ( DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOO… in INTERN_DVBT_Config() argument
1118 …ULOGD("DEMOD"," @INTERN_DVBT_config %d %d %d %d %d %d %d %d\n", BW, bSerialTS, bPalBG, bLPSel, u8T… in INTERN_DVBT_Config()
1122 switch(BW) in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBT2.c1397 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1402 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1406 switch(BW) in INTERN_DVBT2_Config()
1432 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1121 MS_BOOL INTERN_DVBT_Config ( DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOO… in INTERN_DVBT_Config() argument
1126 …DBG_INTERN_DVBT(printf(" @INTERN_DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, … in INTERN_DVBT_Config()
1130 switch(BW) in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBT2.c1371 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1376 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1380 switch(BW) in INTERN_DVBT2_Config()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBT2.c1371 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1376 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1380 switch(BW) in INTERN_DVBT2_Config()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBT2.c1410 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1415 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1419 switch(BW) in INTERN_DVBT2_Config()
1445 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBT2.c1371 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1376 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1380 switch(BW) in INTERN_DVBT2_Config()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBT2.c1371 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1376 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1380 switch(BW) in INTERN_DVBT2_Config()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBT2.c1371 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1376 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1380 switch(BW) in INTERN_DVBT2_Config()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBT2.c1371 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1376 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1380 switch(BW) in INTERN_DVBT2_Config()
1406 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
H A DhalDMD_INTERN_DVBT.c1287 MS_BOOL INTERN_DVBT_Config ( DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOO… in INTERN_DVBT_Config() argument
1292 …DBG_INTERN_DVBT(ULOGD("DEMOD"," @INTERN_DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, b… in INTERN_DVBT_Config()
1296 switch(BW) in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBT2.c1410 MS_BOOL INTERN_DVBT2_Config(DMD_DVBT2_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_U8 u8TSClk, MS… in INTERN_DVBT2_Config() argument
1415 …DBG_INTERN_DVBT2(printf(" @INTERN_DVBT2_config %d %d %d %ld %d\n", BW, bSerialTS, u8TSClk, u32IFFr… in INTERN_DVBT2_Config()
1419 switch(BW) in INTERN_DVBT2_Config()
1445 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(E_DMD_T2_BW, BW); in INTERN_DVBT2_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/drv/dmd/t3/Int_DVBT/
H A DINTERN_DVBT.c1217 BOOLEAN INTERN_DVBT_Config ( RF_CHANNEL_BANDWIDTH BW, BOOLEAN bSerialTS, BOOLEAN bPalBG) in INTERN_DVBT_Config() argument
1228 switch(BW) in INTERN_DVBT_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/
H A DhalDMD_INTERN_DVBT.c1512 MS_BOOL INTERN_DVBT_Config ( DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOO… in INTERN_DVBT_Config() argument
1517 …DBG_INTERN_DVBT(printf(" @INTERN_DVBT_config %d %d %d %d %d %ld %ld %d\n", BW, bSerialTS, bPalBG, … in INTERN_DVBT_Config()
1521 switch(BW) in INTERN_DVBT_Config()

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