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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvDMD_INTERN_DVBT.h 98 /// @brief DVBT Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 /*! \defgroup Demod Demod modules 103 104 *! \defgroup DVBT DVBT interface (drvDMD_INTERN_DVBT.h) 105 * \ingroup Demod 106 107 \brief 108 109 DVBT driver is a driver for control the operation of the DVB-T system. Some important 110 information can be shown by calling the relative information function. 111 112 <b>Features</b> 113 - Init 114 - Exit 115 - Set Dbg Level 116 - Get Info 117 - Get Lib Ver 118 - Get Reg 119 - Set Reg 120 - Set Serial Control 121 - Set Config 122 - Set Config HPLP 123 - Set Config HPLP Set IF 124 - Set Active 125 - Get Lock 126 - Get Signal Strength 127 - Get Signal Strength With RF Power 128 - Get Signal Quality 129 - Get Signal Quality With RF Power 130 - Get SNR 131 - Get Post Viterbi Ber 132 - Get Pre Viterbi Ber 133 - Get Packet Err 134 - Get TPS Info 135 - Get Cell ID 136 - Get Freq Offset 137 - NORDIG SSI Table Write 138 - NORDIG SSI Table Read 139 - Set Power State 140 141 142 <b> DVBT Block Diagram: </b> \n 143 \image html DVBT.png 144 145 <b> Operation Code Flow: </b> \n 146 -# Init 147 -# SetConfig 148 -# Get lock 149 -# Get relative information 150 151 152 153 *! \defgroup DVBT DVBT interface (drvDMD_INTERN_DVBT.h) 154 * \ingroup Demod 155 156 * *! \defgroup DVBT_BASIC DMD Module basic 157 * \ingroup DVBT 158 159 *! \defgroup DVBT_To_Be_Removed DVBT to be removed 160 * \ingroup DVBT 161 162 *! \defgroup DVBT_To_Be_Modified DVBT to be modified 163 * \ingroup DVBT 164 165 *! \defgroup DVBT_REG To set/get register 166 * \ingroup DVBT 167 168 *! \defgroup DVBT_CONFIG DVBT config 169 * \ingroup DVBT 170 171 *! \defgroup DVBT_LOCK DVBT get lock 172 * \ingroup DVBT 173 174 *! \defgroup DVBT_INFO To get DVBT information 175 * \ingroup DVBT 176 177 */ 178 179 #ifndef _DRV_DVBT_H_ 180 #define _DRV_DVBT_H_ 181 182 #include "MsCommon.h" 183 #include "drvDMD_common.h" 184 #ifdef __cplusplus 185 extern "C" 186 { 187 #endif 188 189 190 //------------------------------------------------------------------------------------------------- 191 // Driver Capability 192 //------------------------------------------------------------------------------------------------- 193 194 195 //------------------------------------------------------------------------------------------------- 196 // Macro and Define 197 //------------------------------------------------------------------------------------------------- 198 #define MSIF_DMD_DVBT_INTERN_LIB_CODE {'D','V', 'B','T'} //Lib code 199 #define MSIF_DMD_DVBT_INTERN_LIBVER {'0','1'} //LIB version 200 #define MSIF_DMD_DVBT_INTERN_BUILDNUM {'2','1' } //Build Number 201 #define MSIF_DMD_DVBT_INTERN_CHANGELIST {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number 202 203 #define DMD_DVBT_INTERN_VER /* Character String for DRV/API version */ \ 204 MSIF_TAG, /* 'MSIF' */ \ 205 MSIF_CLASS, /* '00' */ \ 206 MSIF_CUS, /* 0x0000 */ \ 207 MSIF_MOD, /* 0x0000 */ \ 208 MSIF_CHIP, \ 209 MSIF_CPU, \ 210 MSIF_DMD_DVBT_INTERN_LIB_CODE, /* IP__ */ \ 211 MSIF_DMD_DVBT_INTERN_LIBVER, /* 0.0 ~ Z.Z */ \ 212 MSIF_DMD_DVBT_INTERN_BUILDNUM, /* 00 ~ 99 */ \ 213 MSIF_DMD_DVBT_INTERN_CHANGELIST, /* CL# */ \ 214 MSIF_OS 215 216 #define IS_BITS_SET(val, bits) (((val)&(bits)) == (bits)) 217 218 //------------------------------------------------------------------------------------------------- 219 // Type and Structure 220 //------------------------------------------------------------------------------------------------- 221 typedef enum 222 { 223 DMD_DBGLV_NONE, // disable all the debug message 224 DMD_DBGLV_INFO, // information 225 DMD_DBGLV_NOTICE, // normal but significant condition 226 DMD_DBGLV_WARNING, // warning conditions 227 DMD_DBGLV_ERR, // error conditions 228 DMD_DBGLV_CRIT, // critical conditions 229 DMD_DBGLV_ALERT, // action must be taken immediately 230 DMD_DBGLV_EMERG, // system is unusable 231 DMD_DBGLV_DEBUG, // debug-level messages 232 } DMD_DbgLv; 233 234 typedef enum 235 { 236 E_DMD_LOCK, 237 E_DMD_CHECKING, 238 E_DMD_CHECKEND, 239 E_DMD_UNLOCK, 240 E_DMD_NULL, 241 } DMD_LOCK_STATUS; 242 243 typedef enum 244 { 245 E_DMD_DMD_DVBT_GETLOCK, 246 E_DMD_COFDM_FEC_LOCK, 247 E_DMD_COFDM_PSYNC_LOCK, 248 E_DMD_COFDM_TPS_LOCK, 249 E_DMD_COFDM_DCR_LOCK, 250 E_DMD_COFDM_AGC_LOCK, 251 E_DMD_COFDM_MODE_DET, 252 E_DMD_COFDM_TPS_EVER_LOCK, 253 E_DMD_COFDM_NO_CHANNEL, 254 E_DMD_COFDM_NO_CHANNEL_IFAGC, 255 E_DMD_COFDM_ATV_DETECT, 256 E_DMD_COFDM_BER_LOCK, 257 E_DMD_COFDM_SNR_LOCK, 258 E_DMD_COFDM_TR_LOCK, 259 } DMD_DVBT_GETLOCK_TYPE; 260 261 typedef enum 262 { 263 E_DMD_RF_CH_BAND_6MHz = 0x01, 264 E_DMD_RF_CH_BAND_7MHz = 0x02, 265 E_DMD_RF_CH_BAND_8MHz = 0x03, 266 E_DMD_RF_CH_BAND_INVALID 267 } DMD_RF_CHANNEL_BANDWIDTH; 268 269 typedef enum 270 { 271 E_DMD_DVBT_N_PARAM_VERSION = 0x00, //0x00 272 E_DMD_DVBT_N_OP_RFAGC_EN, 273 E_DMD_DVBT_N_OP_HUMDET_EN, 274 E_DMD_DVBT_N_OP_DCR_EN, 275 E_DMD_DVBT_N_OP_IIS_EN, 276 E_DMD_DVBT_N_OP_CCI_EN, 277 E_DMD_DVBT_N_OP_ACI_EN, 278 E_DMD_DVBT_N_OP_IQB_EN, 279 E_DMD_DVBT_N_OP_AUTO_IQ_SWAP_EN, //0x08 280 E_DMD_DVBT_N_OP_AUTO_RF_MAX_EN, 281 E_DMD_DVBT_N_OP_FORCE_ACI_EN, 282 E_DMD_DVBT_N_OP_FIX_MODE_CP_EN, 283 E_DMD_DVBT_N_OP_FIX_TPS_EN, 284 E_DMD_DVBT_N_OP_AUTO_SCAN_MODE_EN, 285 E_DMD_DVBT_N_CFG_RSSI, 286 E_DMD_DVBT_N_CFG_ZIF, //0x0F 287 288 E_DMD_DVBT_N_CFG_NIF, //0x10 289 E_DMD_DVBT_N_CFG_LIF, 290 E_DMD_DVBT_N_CFG_SAWLESS, 291 E_DMD_DVBT_N_CFG_FS_L, 292 E_DMD_DVBT_N_CFG_FS_H, 293 E_DMD_DVBT_N_CFG_FIF_L, 294 E_DMD_DVBT_N_CFG_FIF_H, 295 E_DMD_DVBT_N_CFG_FC_L, 296 E_DMD_DVBT_N_CFG_FC_H, //0x18 297 E_DMD_DVBT_N_CFG_BW, 298 E_DMD_DVBT_N_CFG_MODE, 299 E_DMD_DVBT_N_CFG_CP, 300 E_DMD_DVBT_N_CFG_LP_SEL, 301 E_DMD_DVBT_N_CFG_CSTL, 302 E_DMD_DVBT_N_CFG_HIER, 303 E_DMD_DVBT_N_CFG_HPCR, //0x1F 304 305 E_DMD_DVBT_N_CFG_LPCR, //0x20 306 E_DMD_DVBT_N_CFG_IQ_SWAP, 307 E_DMD_DVBT_N_CFG_RFMAX, 308 E_DMD_DVBT_N_CFG_CCI, 309 E_DMD_DVBT_N_CFG_ICFO_RANGE, 310 E_DMD_DVBT_N_CFG_RFAGC_REF, 311 E_DMD_DVBT_N_CFG_IFAGC_REF_2K, 312 E_DMD_DVBT_N_CFG_IFAGC_REF_8K, 313 E_DMD_DVBT_N_CFG_IFAGC_REF_ACI, //0x28 314 E_DMD_DVBT_N_CFG_IFAGC_REF_IIS, 315 E_DMD_DVBT_N_CFG_IFAGC_REF_2K_H, 316 E_DMD_DVBT_N_CFG_IFAGC_REF_8K_H, 317 E_DMD_DVBT_N_CFG_IFAGC_REF_ACI_H, 318 E_DMD_DVBT_N_CFG_IFAGC_REF_IIS_H, 319 E_DMD_DVBT_N_CFG_TS_SERIAL, 320 E_DMD_DVBT_N_CFG_TS_CLK_INV, //0x2F 321 322 E_DMD_DVBT_N_CFG_TS_DATA_SWAP, //0x30 323 E_DMD_DVBT_N_CFG_8M_DACI_DET_TH_L, 324 E_DMD_DVBT_N_CFG_8M_DACI_DET_TH_H, 325 E_DMD_DVBT_N_CFG_8M_ANM1_DET_TH_L, 326 E_DMD_DVBT_N_CFG_8M_ANM1_DET_TH_H, 327 E_DMD_DVBT_N_CFG_8M_ANP1_DET_TH_L, 328 E_DMD_DVBT_N_CFG_8M_ANP1_DET_TH_H, 329 E_DMD_DVBT_N_CFG_7M_DACI_DET_TH_L, 330 E_DMD_DVBT_N_CFG_7M_DACI_DET_TH_H, //0x38 331 E_DMD_DVBT_N_CFG_7M_ANM1_DET_TH_L, 332 E_DMD_DVBT_N_CFG_7M_ANM1_DET_TH_H, 333 E_DMD_DVBT_N_CFG_7M_ANP1_DET_TH_L, 334 E_DMD_DVBT_N_CFG_7M_ANP1_DET_TH_H, 335 336 E_DMD_DVBT_N_CFO10K_L, 337 E_DMD_DVBT_N_CFO10K_H, 338 E_DMD_DVBT_N_SNR100_L, //0x3F 339 E_DMD_DVBT_N_SNR100_H, //0x40 340 341 E_DMD_DVBT_N_AGC_LOCK_TH, 342 E_DMD_DVBT_N_AGC_LOCK_NUM, 343 E_DMD_DVBT_N_ADC_PGA_GAIN_I, 344 E_DMD_DVBT_N_ADC_PGA_GAIN_Q, 345 E_DMD_DVBT_N_PWDN_ADCI, 346 E_DMD_DVBT_N_PWDN_ADCQ, 347 E_DMD_DVBT_N_MPLL_ADC_DIV_SEL, 348 E_DMD_DVBT_N_DCR_LOCK, //0x48 349 E_DMD_DVBT_N_MIXER_IQ_SWAP_MODE, 350 E_DMD_DVBT_N_CCI_BYPASS, 351 E_DMD_DVBT_N_CCI_LOCK_DET, 352 E_DMD_DVBT_N_CCI_FSWEEP_L, 353 E_DMD_DVBT_N_CCI_FSWEEP_H, 354 E_DMD_DVBT_N_CCI_KPKI, 355 E_DMD_DVBT_N_INTP_RATEM1_0, //0x4F 356 357 E_DMD_DVBT_N_INTP_RATEM1_1, //0x50 358 E_DMD_DVBT_N_INTP_RATEM1_2, 359 E_DMD_DVBT_N_INTP_RATEM1_3, 360 E_DMD_DVBT_N_8K_MC_MODE, 361 E_DMD_DVBT_N_8K_MC_CP, 362 E_DMD_DVBT_N_8K_MC_CPOBS_NUM, 363 E_DMD_DVBT_N_8K_MODECP_DET, 364 E_DMD_DVBT_N_2K_MC_MODE, 365 E_DMD_DVBT_N_2K_MC_CP, //0x58 366 E_DMD_DVBT_N_2K_MC_CPOBS_NUM, 367 E_DMD_DVBT_N_2K_MODECP_DET, 368 E_DMD_DVBT_N_ICFO_SCAN_WINDOW_L, 369 E_DMD_DVBT_N_ICFO_SCAN_WINDOW_H, 370 E_DMD_DVBT_N_ICFO_MAX_OFFSET_L, 371 E_DMD_DVBT_N_ICFO_MAX_OFFSET_H, 372 E_DMD_DVBT_N_ICFO_DONE, //0x5F 373 374 E_DMD_DVBT_N_TPS_SYNC_LOCK, //0x60 375 E_DMD_DVBT_N_CONSTELLATION, 376 E_DMD_DVBT_N_HIERARCHY, 377 E_DMD_DVBT_N_HP_CODE_RATE, 378 E_DMD_DVBT_N_LP_CODE_RATE, 379 E_DMD_DVBT_N_GUARD_INTERVAL, 380 E_DMD_DVBT_N_TRANSMISSION_MODE, 381 E_DMD_DVBT_N_OFDM_SYMBOL_NUMBER, 382 E_DMD_DVBT_N_LENGTH_INDICATOR, //0x68 383 E_DMD_DVBT_N_FRAME_NUMBER, 384 E_DMD_DVBT_N_CELL_IDENTIFIER, 385 E_DMD_DVBT_N_DVBH_SIGNALLING, 386 E_DMD_DVBT_N_SNR_2K_ALPHA, 387 E_DMD_DVBT_N_SNR_8K_ALPHA, 388 E_DMD_DVBT_N_TS_EN, 389 E_DMD_DVBT_N_2K_DAGC1_REF, //0x6F 390 391 E_DMD_DVBT_N_8K_DAGC1_REF, //0x70 392 E_DMD_DVBT_N_2K_8K_DAGC2_REF, 393 E_DMD_DVBT_N_IF_INV_PWM_OUT_EN, 394 E_DMD_DVBT_N_RESERVE_0, 395 E_DMD_DVBT_N_RESERVE_1, 396 E_DMD_DVBT_N_RESERVE_2, 397 E_DMD_DVBT_N_RESERVE_3, 398 E_DMD_DVBT_N_RESERVE_4, 399 E_DMD_DVBT_N_RESERVE_5, //0x78 400 E_DMD_DVBT_N_RESERVE_6, 401 E_DMD_DVBT_N_RESERVE_7, 402 E_DMD_DVBT_N_RESERVE_8, 403 E_DMD_DVBT_N_RESERVE_9, 404 E_DMD_DVBT_N_RESERVE_10, 405 E_DMD_DVBT_N_RESERVE_11, //0x7E 406 }DVBT_N_Param; 407 408 typedef enum 409 { 410 //Parameter version 411 E_DMD_DVBT_PARAM_VERSION = 0x00,// 0x00 412 //System 413 E_DMD_DVBT_OP_AUTO_SCAN_MODE_EN,// 414 E_DMD_DVBT_CFG_FREQ,// 415 E_DMD_DVBT_CFG_BW,// 416 E_DMD_DVBT_CFG_MODE,// 417 E_DMD_DVBT_CFG_CP,// 418 E_DMD_DVBT_CFG_LP_SEL,// 419 E_DMD_DVBT_CFG_CSTL,// 420 E_DMD_DVBT_CFG_HIER, //0x08 421 E_DMD_DVBT_CFG_HPCR,// 422 E_DMD_DVBT_CFG_LPCR,// 423 424 //AGC 425 E_DMD_DVBT_OP_RFAGC_EN,// 426 E_DMD_DVBT_OP_HUMDET_EN,// 427 E_DMD_DVBT_OP_AUTO_RF_MAX_EN,// 428 E_DMD_DVBT_CFG_RFMAX,// 429 E_DMD_DVBT_CFG_ZIF,// 430 E_DMD_DVBT_CFG_RSSI, //0x10 431 E_DMD_DVBT_CFG_RFAGC_REF,// 432 E_DMD_DVBT_AGC_K,// 433 E_DMD_DVBT_CFG_IFAGC_REF_2K,// 434 E_DMD_DVBT_CFG_IFAGC_REF_8K,// 435 E_DMD_DVBT_CFG_IFAGC_REF_ACI,// 436 E_DMD_DVBT_CFG_IFAGC_REF_IIS,// 437 E_DMD_DVBT_AGC_REF, 438 E_DMD_DVBT_AGC_LOCK_TH, //0x18 439 E_DMD_DVBT_AGC_LOCK_NUM, // 440 E_DMD_DVBT_AGC_GAIN_LOCK,// 441 442 //ADC 443 E_DMD_DVBT_PWDN_ADCI,// 444 E_DMD_DVBT_PWDN_ADCQ,// 445 E_DMD_DVBT_MPLL_ADC_DIV_SEL,// 446 447 //DCR 448 E_DMD_DVBT_OP_DCR_EN,// 449 E_DMD_DVBT_DCR_LOCK,// 450 E_DMD_DVBT_DCR_LEAKY_I_FF_0,//0x20 451 E_DMD_DVBT_DCR_LEAKY_I_FF_1,//0x20 452 E_DMD_DVBT_DCR_LEAKY_I_FF_2,//0x20 453 E_DMD_DVBT_DCR_LEAKY_Q_FF_0, // 454 E_DMD_DVBT_DCR_LEAKY_Q_FF_1, // 455 E_DMD_DVBT_DCR_LEAKY_Q_FF_2, // 456 457 //IIS 458 E_DMD_DVBT_OP_IIS_EN,// 459 460 //Mixer 461 E_DMD_DVBT_CFG_FC_L,// 462 E_DMD_DVBT_CFG_FC_H,// 463 E_DMD_DVBT_CFG_FS_L,// 464 E_DMD_DVBT_CFG_FS_H,// 465 E_DMD_DVBT_MIXER_IQ_SWAP_MODE,// 466 E_DMD_DVBT_MIXER_IQ_SWAP_OUT_0,//0x28 467 E_DMD_DVBT_MIXER_IQ_SWAP_OUT_1, 468 E_DMD_DVBT_MIXER_IQ_SWAP_OUT_2, 469 E_DMD_DVBT_MIXER_IQ_SWAP_OUT_3, 470 E_DMD_DVBT_MIXER_IQ_DBG_SEL,// 471 472 //IQ Swap 473 E_DMD_DVBT_OP_IQB_EN,// 474 E_DMD_DVBT_OP_AUTO_IQ_SWAP_EN,// 475 E_DMD_DVBT_CFG_IQ_SWAP,// 476 E_DMD_DVBT_IQB_PHASE_COARSE_0,// 477 E_DMD_DVBT_IQB_PHASE_COARSE_1,// 478 E_DMD_DVBT_IQB_GAIN_COARSE_0,// 479 E_DMD_DVBT_IQB_GAIN_COARSE_1,// 480 481 //ACI 482 E_DMD_DVBT_OP_ACI_EN,//0x30 483 E_DMD_DVBT_OP_AUTO_ACI_EN, // 484 E_DMD_DVBT_CFG_ACI_DET_TH_L,// 485 E_DMD_DVBT_CFG_ACI_DET_TH_H,// 486 487 //CCI 488 E_DMD_DVBT_OP_CCI_EN,// 489 E_DMD_DVBT_CFG_CCI,// 490 E_DMD_DVBT_CCI_BYPASS,// 491 E_DMD_DVBT_CCI_TRACK_SW_RST,// 492 E_DMD_DVBT_CCI_LOCK_DET,//0x38 493 E_DMD_DVBT_CCI_FREQN_OUT_0, // 494 E_DMD_DVBT_CCI_FREQN_OUT_1, // 495 496 //Interpolator 497 E_DMD_DVBT_CFG_2K_SFO_DELAY_TIME_H,// 498 E_DMD_DVBT_CFG_2K_SFO_DELAY_TIME_L,// 499 E_DMD_DVBT_CFG_8K_SFO_DELAY_TIME_H,// 500 E_DMD_DVBT_CFG_8K_SFO_DELAY_TIME_L,// 501 E_DMD_DVBT_INTP_RATEM1_0,// 502 E_DMD_DVBT_INTP_RATEM1_1,// 503 E_DMD_DVBT_INTP_RATEM1_2,// 504 E_DMD_DVBT_INTP_RATEM1_3,// 505 506 //ModeCP 507 E_DMD_DVBT_OP_FIX_MODE_CP_EN,// 508 E_DMD_DVBT_8K_MC_MODE,// 509 E_DMD_DVBT_8K_MC_CP,// 510 E_DMD_DVBT_8K_MC_CPOBS_NUM,// 511 E_DMD_DVBT_8K_MODECP_DET, // 512 E_DMD_DVBT_2K_MC_MODE, // 513 E_DMD_DVBT_2K_MC_CP, // 514 E_DMD_DVBT_2K_MC_CPOBS_NUM, // 515 E_DMD_DVBT_2K_MODECP_DET, // 516 517 //ICFO 518 E_DMD_DVBT_CFG_ICFO_RANGE,// 519 //E_DMD_DVBT_ICFO_RANGE,//0x40 520 E_DMD_DVBT_ICFO_SCAN_WINDOW_0, // 521 E_DMD_DVBT_ICFO_SCAN_WINDOW_1, // 522 E_DMD_DVBT_ICFO_MAX_OFFSET_0,// 523 E_DMD_DVBT_ICFO_MAX_OFFSET_1,// 524 E_DMD_DVBT_ICFO_DONE,// 525 526 //TPS 527 E_DMD_DVBT_OP_FIX_TPS_EN,// 528 E_DMD_DVBT_TPS_SYNC_LOCK,// 529 E_DMD_DVBT_CONSTELLATION,// 530 E_DMD_DVBT_HIERARCHY,// 531 E_DMD_DVBT_HP_CODE_RATE,//0x48 532 E_DMD_DVBT_LP_CODE_RATE, // 533 E_DMD_DVBT_GUARD_INTERVAL,// 534 E_DMD_DVBT_TRANSMISSION_MODE,// 535 E_DMD_DVBT_OFDM_SYMBOL_NUMBER,// 536 E_DMD_DVBT_LENGTH_INDICATOR,// 537 E_DMD_DVBT_FRAME_NUMBER,// 538 E_DMD_DVBT_CELL_IDENTIFIER,// 539 E_DMD_DVBT_DVBH_SIGNALLING,//0x50 540 541 //SNR 542 E_DMD_DVBT_SNR_ACCU_0, // 543 E_DMD_DVBT_SNR_ACCU_1, // 544 E_DMD_DVBT_SNR_ACCU_2, // 545 E_DMD_DVBT_SNR_ACCU_3, // 546 E_DMD_DVBT_BIT_ERR_NUM_7_0,// 547 E_DMD_DVBT_BIT_ERR_NUM_15_8,// 548 E_DMD_DVBT_BIT_ERR_NUM_23_16,// 549 E_DMD_DVBT_BIT_ERR_NUM_31_24,// 550 E_DMD_DVBT_UNCRT_PKT_NUM_7_0,// 551 E_DMD_DVBT_UNCRT_PKT_NUM_15_8,// 552 553 //TS 554 E_DMD_DVBT_CFG_TS_SERIAL,//0x58 555 E_DMD_DVBT_CFG_TS_CLK_RATE,// 556 E_DMD_DVBT_CFG_TS_CLK_INV,// 557 E_DMD_DVBT_CFG_TS_DATA_SWAP,// 558 E_DMD_DVBT_TS_EN,// 559 E_DMD_DVBT_TS_SOURCE_SEL,// 560 E_DMD_DVBT_DVBTM_TS_CLK_POL,// 561 E_DMD_DVBT_DVBTM_TS_CLK_DIVNUM,//0x60 562 E_DMD_DVBT_EN_TS_PAD, // 563 E_DMD_DVBT_IF_INV_PWM_OUT_EN, 564 565 //Reserve 566 E_DMD_DVBT_RESERVE_1, 567 E_DMD_DVBT_RESERVE_2, 568 E_DMD_DVBT_RESERVE_3, 569 E_DMD_DVBT_RESERVE_4, 570 571 //Debug 572 E_DMD_DVBT_CHECKSUM,//0x62 573 } DVBT_Param; 574 575 /// For demod init 576 typedef struct 577 { 578 // tuner parameter 579 MS_U8 u8SarChannel; 580 DMD_RFAGC_SSI *pTuner_RfagcSsi; 581 MS_U16 u16Tuner_RfagcSsi_Size; 582 DMD_IFAGC_SSI *pTuner_IfagcSsi_LoRef; 583 MS_U16 u16Tuner_IfagcSsi_LoRef_Size; 584 DMD_IFAGC_SSI *pTuner_IfagcSsi_HiRef; 585 MS_U16 u16Tuner_IfagcSsi_HiRef_Size; 586 DMD_IFAGC_ERR *pTuner_IfagcErr_LoRef; 587 MS_U16 u16Tuner_IfagcErr_LoRef_Size; 588 DMD_IFAGC_ERR *pTuner_IfagcErr_HiRef; 589 MS_U16 u16Tuner_IfagcErr_HiRef_Size; 590 DMD_SQI_CN_NORDIGP1 *pSqiCnNordigP1; 591 MS_U16 u16SqiCnNordigP1_Size; 592 593 // register init 594 MS_U8 *u8DMD_DVBT_DSPRegInitExt; // TODO use system variable type 595 MS_U8 u8DMD_DVBT_DSPRegInitSize; 596 MS_U8 *u8DMD_DVBT_InitExt; // TODO use system variable type 597 } DMD_DVBT_InitData; 598 599 typedef enum 600 { 601 E_DMD_DVBT_FAIL=0, 602 E_DMD_DVBT_OK=1 603 } DMD_DVBT_Result; 604 605 606 typedef enum 607 { 608 E_DMD_DVBT_MODULATION_INFO, 609 E_DMD_DVBT_DEMOD_INFO, 610 E_DMD_DVBT_LOCK_INFO, 611 E_DMD_DVBT_PRESFO_INFO, 612 E_DMD_DVBT_LOCK_TIME_INFO, 613 E_DMD_DVBT_BER_INFO, 614 E_DMD_DVBT_AGC_INFO, 615 } DMD_DVBT_INFO_TYPE; 616 617 typedef struct 618 { 619 MS_U16 u16Version; 620 MS_U8 u16DemodState; // 621 float SfoValue; // 622 float TotalCfo; // 623 MS_U16 u16ChannelLength; // 624 MS_U8 u8Fft; // 625 MS_U8 u8Constel; // 626 MS_U8 u8Gi; // 627 MS_U8 u8HpCr; // 628 MS_U8 u8LpCr; // 629 MS_U8 u8Hiearchy; // 630 MS_U8 u8Fd; // 631 MS_U8 u8ChLen; // 632 MS_U8 u8SnrSel; // 633 MS_U8 u8PertoneNum; // 634 MS_U8 u8DigAci; // 635 MS_U8 u8FlagCi; // 636 MS_U8 u8TdCoef; // 637 } DMD_DVBT_Info; 638 639 //typedef void(*P_DMD_ISR_Proc)(MS_U8 u8DMDID); 640 641 642 //------------------------------------------------------------------------------------------------- 643 // Function and Variable 644 //------------------------------------------------------------------------------------------------- 645 //////////////////////////////////////////////////////////////////////////////// 646 /// MDrv_DMD_DVBT_Init 647 //////////////////////////////////////////////////////////////////////////////// 648 //------------------------------------------------------------------------------------------------- 649 /// Initialize DVBT 650 /// @ingroup DVBT_BASIC 651 /// @param pDMD_DVBT_InitData \b IN: Initial data 652 /// @param u32InitDataLen \b IN: Initial data length 653 /// @return TRUE : succeed 654 /// @return FALSE : fail 655 //------------------------------------------------------------------------------------------------- 656 extern MS_BOOL MDrv_DMD_DVBT_Init(DMD_DVBT_InitData *pDMD_DVBT_InitData, MS_U32 u32InitDataLen); 657 658 //////////////////////////////////////////////////////////////////////////////// 659 /// Should be called when exit VD input source 660 //////////////////////////////////////////////////////////////////////////////// 661 //------------------------------------------------------------------------------------------------- 662 /// Exit DVBT 663 /// @ingroup DVBT_BASIC 664 /// @return TRUE : succeed 665 /// @return FALSE : fail 666 //------------------------------------------------------------------------------------------------- 667 extern MS_BOOL MDrv_DMD_DVBT_Exit(void); 668 669 //------------------------------------------------------------------------------ 670 /// Set detailed level of DVBT driver debug message 671 /// u8DbgLevel : debug level for Parallel Flash driver\n 672 /// AVD_DBGLV_NONE, ///< disable all the debug message\n 673 /// AVD_DBGLV_INFO, ///< information\n 674 /// AVD_DBGLV_NOTICE, ///< normal but significant condition\n 675 /// AVD_DBGLV_WARNING, ///< warning conditions\n 676 /// AVD_DBGLV_ERR, ///< error conditions\n 677 /// AVD_DBGLV_CRIT, ///< critical conditions\n 678 /// AVD_DBGLV_ALERT, ///< action must be taken immediately\n 679 /// AVD_DBGLV_EMERG, ///< system is unusable\n 680 /// AVD_DBGLV_DEBUG, ///< debug-level messages\n 681 /// @return TRUE : succeed 682 /// @return FALSE : failed to set the debug level 683 //------------------------------------------------------------------------------ 684 685 //------------------------------------------------------------------------------------------------- 686 /// Set detailed level of DVBT driver debug message 687 /// @ingroup DVBT_BASIC 688 /// @param u8DbgLevel \b IN: debug level for Parallel Flash driver 689 /// @return TRUE : succeed 690 /// @return FALSE : fail 691 //------------------------------------------------------------------------------------------------- 692 // extern MS_BOOL MDrv_DMD_DVBT_SetDbgLevel(DMD_DbgLv u8DbgLevel); 693 694 //------------------------------------------------------------------------------------------------- 695 /// Get the information of DVBT driver\n 696 /// @return the pointer to the driver information 697 //------------------------------------------------------------------------------------------------- 698 //------------------------------------------------------------------------------------------------- 699 /// Get the information of DVBT driver 700 /// @ingroup DVBT_INFO 701 /// @param eInfoType \b IN: DVBT information type 702 /// @return : the pointer to the driver information 703 //------------------------------------------------------------------------------------------------- 704 extern DMD_DVBT_Info* MDrv_DMD_DVBT_GetInfo(DMD_DVBT_INFO_TYPE eInfoType); 705 706 //------------------------------------------------------------------------------------------------- 707 /// Get DVBT driver version 708 /// when get ok, return the pointer to the driver version 709 //------------------------------------------------------------------------------------------------- 710 //------------------------------------------------------------------------------------------------- 711 /// Get DVBT intern version 712 /// @ingroup DVBT_INFO 713 /// @param ppVersion \b IN: Version 714 /// @return TRUE : succeed 715 /// @return FALSE : fail 716 //------------------------------------------------------------------------------------------------- 717 extern MS_BOOL MDrv_DMD_DVBT_GetLibVer(const MSIF_Version **ppVersion); 718 719 //////////////////////////////////////////////////////////////////////////////// 720 /// To get DVBT's register value, only for special purpose.\n 721 /// u16Addr : the address of DVBT's register\n 722 /// return the value of AFEC's register\n 723 //////////////////////////////////////////////////////////////////////////////// 724 //------------------------------------------------------------------------------------------------- 725 /// To get DVBT's register value, only for special purpose 726 /// @ingroup DVBT_REG 727 /// @param u16Addr \b IN: register address 728 /// @param pu8Data \b IN: register value 729 /// @return TRUE : succeed 730 /// @return FALSE : fail 731 //------------------------------------------------------------------------------------------------- 732 extern MS_BOOL MDrv_DMD_DVBT_GetReg(MS_U16 u16Addr, MS_U8 *pu8Data); 733 734 //////////////////////////////////////////////////////////////////////////////// 735 /// To set DVBT's register value, only for special purpose.\n 736 /// u16Addr : the address of DVBT's register\n 737 /// u8Value : the value to be set\n 738 //////////////////////////////////////////////////////////////////////////////// 739 //------------------------------------------------------------------------------------------------- 740 /// To get DVBT FW version 741 /// @ingroup DVBT_INFO 742 /// @param ver \b IN: FW version 743 /// @return TRUE : succeed 744 /// @return FALSE : fail 745 //------------------------------------------------------------------------------------------------- 746 // extern MS_BOOL MDrv_DMD_DVBTGetFWVer(MS_U16 *ver); 747 748 //////////////////////////////////////////////////////////////////////////////// 749 /// Get DVBT FW version 750 /// u16Addr : the address of DVBT's register\n 751 //////////////////////////////////////////////////////////////////////////////// 752 //------------------------------------------------------------------------------------------------- 753 /// To set DVBT's register value, only for special purpose 754 /// @ingroup DVBT_REG 755 /// @param u16Addr \b IN: register address 756 /// @param pu8Data \b IN: register value 757 /// @return TRUE : succeed 758 /// @return FALSE : fail 759 //------------------------------------------------------------------------------------------------- 760 extern MS_BOOL MDrv_DMD_DVBT_SetReg(MS_U16 u16Addr, MS_U8 u8Data); 761 762 //////////////////////////////////////////////////////////////////////////////// 763 /// MDrv_DMD_DVBT_SetSerialControl 764 //////////////////////////////////////////////////////////////////////////////// 765 //------------------------------------------------------------------------------------------------- 766 /// To set TS serial/parallel mode 767 /// @ingroup DVBT_CONFIG 768 /// @param bEnable \b IN: 1=>serial, 0=>parallel 769 /// @return TRUE : succeed 770 /// @return FALSE : fail 771 //------------------------------------------------------------------------------------------------- 772 extern MS_BOOL MDrv_DMD_DVBT_SetSerialControl(MS_BOOL bEnable); 773 774 //////////////////////////////////////////////////////////////////////////////// 775 /// MDrv_DMD_DVBT_SetConfig 776 //////////////////////////////////////////////////////////////////////////////// 777 //------------------------------------------------------------------------------------------------- 778 /// To set config data 779 /// @ingroup DVBT_CONFIG 780 /// @param BW \b IN: RF channel bandwidth 781 /// @param bSerialTS \b IN: 1=>serial, 0=>parallel 782 /// @param bPalBG \b IN: For Analog CCI 0:PAL B/G (Nordig), 1:PAL I (D-Book) 783 /// @return TRUE : succeed 784 /// @return FALSE : fail 785 //------------------------------------------------------------------------------------------------- 786 // extern MS_BOOL MDrv_DMD_DVBT_SetConfig(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG); 787 788 //////////////////////////////////////////////////////////////////////////////// 789 /// MDrv_DMD_DVBT_SetConfigHPLP 790 //////////////////////////////////////////////////////////////////////////////// 791 //------------------------------------------------------------------------------------------------- 792 /// To set config data 793 /// @ingroup DVBT_CONFIG 794 /// @param BW \b IN: RF channel bandwidth 795 /// @param bSerialTS \b IN: 1=>serial, 0=>parallel 796 /// @param bPalBG \b IN: For Analog CCI 0:PAL B/G (Nordig), 1:PAL I (D-Book) 797 /// @param bLPSel \b IN: Hierarchy mode 798 /// @return TRUE : succeed 799 /// @return FALSE : fail 800 //------------------------------------------------------------------------------------------------- 801 extern MS_BOOL MDrv_DMD_DVBT_SetConfigHPLP(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel); 802 803 //////////////////////////////////////////////////////////////////////////////// 804 /// MDrv_DMD_DVBT_SetConfigHPLPSetIF 805 //////////////////////////////////////////////////////////////////////////////// 806 //------------------------------------------------------------------------------------------------- 807 /// To set config data 808 /// @ingroup DVBT_CONFIG 809 /// @param BW \b IN: RF channel bandwidth 810 /// @param bSerialTS \b IN: 1=>serial, 0=>parallel 811 /// @param bPalBG \b IN: For Analog CCI 0:PAL B/G (Nordig), 1:PAL I (D-Book) 812 /// @param bLPSel \b IN: Hierarchy mode 813 /// @param u32IFFreq \b IN: IF frequency 814 /// @param u32FSFreq \b IN: FS frequency 815 /// @param u8IQSwap \b IN: IQ swap 816 /// @return TRUE : succeed 817 /// @return FALSE : fail 818 //------------------------------------------------------------------------------------------------- 819 extern MS_BOOL MDrv_DMD_DVBT_SetConfigHPLPSetIF(DMD_RF_CHANNEL_BANDWIDTH BW, MS_BOOL bSerialTS, MS_BOOL bPalBG, MS_BOOL bLPSel, MS_U32 u32IFFreq, MS_U32 u32FSFreq, MS_U8 u8IQSwap); 820 821 /////////////////////////////////////////////////////////////////////////////// 822 /// MDrv_DMD_DVBT_SetActive 823 //////////////////////////////////////////////////////////////////////////////// 824 //------------------------------------------------------------------------------------------------- 825 /// To active DVBT FSM 826 /// @ingroup DVBT_BASIC 827 /// @param bEnable \b IN: 1=>Enable 828 /// @return TRUE : succeed 829 /// @return FALSE : fail 830 //------------------------------------------------------------------------------------------------- 831 extern MS_BOOL MDrv_DMD_DVBT_SetActive(MS_BOOL bEnable); 832 833 //////////////////////////////////////////////////////////////////////////////// 834 /// MDrv_DMD_DVBT_Get_Lock 835 //////////////////////////////////////////////////////////////////////////////// 836 //------------------------------------------------------------------------------------------------- 837 /// DVBT get lock flow 838 /// @ingroup DVBT_LOCK 839 /// @param eType \b IN: DVBT get lock 840 /// @param eLockStatus \b IN: DVBT lock status 841 /// @return TRUE : succeed 842 /// @return FALSE : fail 843 //------------------------------------------------------------------------------------------------- 844 extern MS_BOOL MDrv_DMD_DVBT_GetLock(DMD_DVBT_GETLOCK_TYPE eType, DMD_LOCK_STATUS *eLockStatus); 845 846 //////////////////////////////////////////////////////////////////////////////// 847 /// MDrv_DMD_DVBT_GetSignalStrength 848 //////////////////////////////////////////////////////////////////////////////// 849 //------------------------------------------------------------------------------------------------- 850 /// To get signal strength 851 /// @ingroup DVBT_INFO 852 /// @param u16Strength \b IN: Signal strength 853 /// @return TRUE : succeed 854 /// @return FALSE : fail 855 //------------------------------------------------------------------------------------------------- 856 extern MS_BOOL MDrv_DMD_DVBT_GetSignalStrength(MS_U16 *u16Strength); 857 858 //////////////////////////////////////////////////////////////////////////////// 859 /// MDrv_DMD_DVBT_GetSignalStrengthWithRFPower 860 //////////////////////////////////////////////////////////////////////////////// 861 //------------------------------------------------------------------------------------------------- 862 /// To get signal strength with RF power 863 /// @ingroup DVBT_INFO 864 /// @param u16Strength \b IN: Signal strength 865 /// @param fRFPowerDbm \b IN: RF power 866 /// @return TRUE : succeed 867 /// @return FALSE : fail 868 //------------------------------------------------------------------------------------------------- 869 extern MS_BOOL MDrv_DMD_DVBT_GetSignalStrengthWithRFPower(MS_U16 *u16Strength, float fRFPowerDbm); 870 871 //////////////////////////////////////////////////////////////////////////////// 872 /// MDrv_DMD_DVBT_GetSignalQuality 873 //////////////////////////////////////////////////////////////////////////////// 874 //------------------------------------------------------------------------------------------------- 875 /// To get signal quality 876 /// @ingroup DVBT_INFO 877 /// @param u16Quality \b IN: Signal quality 878 /// @return TRUE : succeed 879 /// @return FALSE : fail 880 //------------------------------------------------------------------------------------------------- 881 extern MS_BOOL MDrv_DMD_DVBT_GetSignalQuality(MS_U16 *u16Quality); 882 883 //////////////////////////////////////////////////////////////////////////////// 884 /// MDrv_DMD_DVBT_GetSignalQualityWithRFPower 885 //////////////////////////////////////////////////////////////////////////////// 886 //------------------------------------------------------------------------------------------------- 887 /// To get signal quality with RF power 888 /// @ingroup DVBT_INFO 889 /// @param u16Quality \b IN: Signal quality 890 /// @param fRFPowerDbm \b IN: RF power 891 /// @return TRUE : succeed 892 /// @return FALSE : fail 893 //------------------------------------------------------------------------------------------------- 894 extern MS_BOOL MDrv_DMD_DVBT_GetSignalQualityWithRFPower(MS_U16 *u16Quality, float fRFPowerDbm); 895 896 //////////////////////////////////////////////////////////////////////////////// 897 /// MDrv_DMD_DVBT_GetSNR 898 //////////////////////////////////////////////////////////////////////////////// 899 //------------------------------------------------------------------------------------------------- 900 /// To get SNR 901 /// @ingroup DVBT_INFO 902 /// @param fSNR \b IN: SNR 903 /// @return TRUE : succeed 904 /// @return FALSE : fail 905 //------------------------------------------------------------------------------------------------- 906 extern MS_BOOL MDrv_DMD_DVBT_GetSNR(float *fSNR); 907 908 //////////////////////////////////////////////////////////////////////////////// 909 /// MDrv_DMD_DVBT_GetPostViterbiBer 910 //////////////////////////////////////////////////////////////////////////////// 911 //------------------------------------------------------------------------------------------------- 912 /// To get post viterbi BER 913 /// @ingroup DVBT_INFO 914 /// @param ber \b IN: BER 915 /// @return TRUE : succeed 916 /// @return FALSE : fail 917 //------------------------------------------------------------------------------------------------- 918 extern MS_BOOL MDrv_DMD_DVBT_GetPostViterbiBer(float *ber); 919 920 //////////////////////////////////////////////////////////////////////////////// 921 /// MDrv_DMD_DVBT_GetPreViterbiBer 922 //////////////////////////////////////////////////////////////////////////////// 923 //------------------------------------------------------------------------------------------------- 924 /// To get pre viterbi BER 925 /// @ingroup DVBT_INFO 926 /// @param ber \b IN: BER 927 /// @return TRUE : succeed 928 /// @return FALSE : fail 929 //------------------------------------------------------------------------------------------------- 930 extern MS_BOOL MDrv_DMD_DVBT_GetPreViterbiBer(float *ber); 931 932 //////////////////////////////////////////////////////////////////////////////// 933 /// MDrv_DMD_DVBT_GetPacketErr 934 //////////////////////////////////////////////////////////////////////////////// 935 //------------------------------------------------------------------------------------------------- 936 /// To get packet error 937 /// @ingroup DVBT_INFO 938 /// @param pktErr \b IN: Packet error 939 /// @return TRUE : succeed 940 /// @return FALSE : fail 941 //------------------------------------------------------------------------------------------------- 942 extern MS_BOOL MDrv_DMD_DVBT_GetPacketErr(MS_U16 *pktErr); 943 944 //////////////////////////////////////////////////////////////////////////////// 945 /// MDrv_DMD_DVBT_GetTPSInfo 946 //////////////////////////////////////////////////////////////////////////////// 947 //------------------------------------------------------------------------------------------------- 948 /// To get TPS information 949 /// @ingroup DVBT_INFO 950 /// @param u16Info \b IN: TPS information 951 /// @return TRUE : succeed 952 /// @return FALSE : fail 953 //------------------------------------------------------------------------------------------------- 954 extern MS_BOOL MDrv_DMD_DVBT_GetTPSInfo(MS_U16 *u16Info); 955 956 //////////////////////////////////////////////////////////////////////////////// 957 /// MDrv_DMD_DVBT_GetCellID 958 //////////////////////////////////////////////////////////////////////////////// 959 //------------------------------------------------------------------------------------------------- 960 /// To get cell ID 961 /// @ingroup DVBT_INFO 962 /// @param u16CellID \b IN: Cell ID 963 /// @return TRUE : succeed 964 /// @return FALSE : fail 965 //------------------------------------------------------------------------------------------------- 966 extern MS_BOOL MDrv_DMD_DVBT_GetCellID(MS_U16 *u16CellID); 967 968 //////////////////////////////////////////////////////////////////////////////// 969 /// MDrv_DMD_DVBT_GetFreqOffset 970 //////////////////////////////////////////////////////////////////////////////// 971 //------------------------------------------------------------------------------------------------- 972 /// To get frequency offset 973 /// @ingroup DVBT_INFO 974 /// @param pFreqOff \b IN: frequency offset 975 /// @return TRUE : succeed 976 /// @return FALSE : fail 977 //------------------------------------------------------------------------------------------------- 978 // extern MS_BOOL MDrv_DMD_DVBT_GetFreqOffset(float *pFreqOff); 979 980 //////////////////////////////////////////////////////////////////////////////// 981 /// MDrv_DMD_DVBT_NORDIG_SSI_Table_Write 982 //////////////////////////////////////////////////////////////////////////////// 983 //------------------------------------------------------------------------------------------------- 984 /// To write DVBT nordig SSI table 985 /// @ingroup DVBT_REG 986 /// @param constel \b IN: constel 987 /// @param code_rate \b IN: code rate 988 /// @param write_value \b IN: write value 989 /// @return TRUE : succeed 990 /// @return FALSE : fail 991 //------------------------------------------------------------------------------------------------- 992 // extern MS_BOOL MDrv_DMD_DVBT_NORDIG_SSI_Table_Write(DMD_CONSTEL constel, DMD_CODERATE code_rate, float write_value); 993 994 //////////////////////////////////////////////////////////////////////////////// 995 /// MDrv_DMD_DVBT_NORDIG_SSI_Table_Read 996 //////////////////////////////////////////////////////////////////////////////// 997 //------------------------------------------------------------------------------------------------- 998 /// To read DVBT nordig SSI table 999 /// @ingroup DVBT_REG 1000 /// @param constel \b IN: constel 1001 /// @param code_rate \b IN: code rate 1002 /// @param read_value \b IN: read value 1003 /// @return TRUE : succeed 1004 /// @return FALSE : fail 1005 //------------------------------------------------------------------------------------------------- 1006 // extern MS_BOOL MDrv_DMD_DVBT_NORDIG_SSI_Table_Read(DMD_CONSTEL constel, DMD_CODERATE code_rate, float *read_value); 1007 1008 //------------------------------------------------------------------------------------------------- 1009 /// To set DVBT power state 1010 /// @ingroup DVBT_BASIC 1011 /// @param u16PowerState \b IN: Power mode 1012 /// @return UTOPIA_STATUS_TRUE : succeed 1013 /// @return UTOPIA_STATUS_FAIL : fail 1014 //------------------------------------------------------------------------------------------------- 1015 // extern MS_U32 MDrv_DMD_DVBT_SetPowerState(EN_POWER_MODE u16PowerState); 1016 #ifdef __cplusplus 1017 } 1018 #endif 1019 1020 1021 #endif // _DRV_DVBT_H_ 1022 1023