| /rk3399_rockchip-uboot/drivers/mmc/ |
| H A D | rockchip_dw_mmc.c | 151 u32 raw_value; in rockchip_mmc_get_phase() local 160 raw_value = dwmci_readl(host, SDMMC_TIMING_CON1) >> 1; in rockchip_mmc_get_phase() 162 raw_value = dwmci_readl(host, SDMMC_TIMING_CON0) >> 1; in rockchip_mmc_get_phase() 164 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rockchip_mmc_get_phase() 165 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rockchip_mmc_get_phase() 169 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rockchip_mmc_get_phase() 183 u32 raw_value; in rockchip_mmc_set_phase() local 237 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rockchip_mmc_set_phase() 238 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase() 239 raw_value |= nineties; in rockchip_mmc_set_phase() [all …]
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3128.c | 679 u32 raw_value, delay_num; in rk3128_mmc_get_phase() local 689 raw_value = readl(&cru->cru_emmc_con[1]); in rk3128_mmc_get_phase() 691 raw_value = readl(&cru->cru_sdmmc_con[1]); in rk3128_mmc_get_phase() 693 raw_value = readl(&cru->cru_sdio_con[1]); in rk3128_mmc_get_phase() 695 raw_value >>= 1; in rk3128_mmc_get_phase() 696 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk3128_mmc_get_phase() 698 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk3128_mmc_get_phase() 703 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk3128_mmc_get_phase() 716 u32 raw_value, delay; in rk3128_mmc_set_phase() local 738 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk3128_mmc_set_phase() [all …]
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| H A D | clk_rk322x.c | 822 u32 raw_value, delay_num; in rk322x_mmc_get_phase() local 832 raw_value = readl(&cru->cru_emmc_con[1]); in rk322x_mmc_get_phase() 834 raw_value = readl(&cru->cru_sdmmc_con[1]); in rk322x_mmc_get_phase() 836 raw_value = readl(&cru->cru_sdio_con[1]); in rk322x_mmc_get_phase() 838 raw_value >>= 1; in rk322x_mmc_get_phase() 839 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk322x_mmc_get_phase() 841 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk322x_mmc_get_phase() 846 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk322x_mmc_get_phase() 859 u32 raw_value, delay; in rk322x_mmc_set_phase() local 881 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk322x_mmc_set_phase() [all …]
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| H A D | clk_rk3328.c | 1159 u32 raw_value, delay_num; in rk3328_mmc_get_phase() local 1169 raw_value = readl(&cru->emmc_con[1]); in rk3328_mmc_get_phase() 1171 raw_value = readl(&cru->sdmmc_con[1]); in rk3328_mmc_get_phase() 1173 raw_value = readl(&cru->sdio_con[1]); in rk3328_mmc_get_phase() 1175 raw_value >>= 1; in rk3328_mmc_get_phase() 1176 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk3328_mmc_get_phase() 1178 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk3328_mmc_get_phase() 1183 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk3328_mmc_get_phase() 1196 u32 raw_value, delay; in rk3328_mmc_set_phase() local 1218 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk3328_mmc_set_phase() [all …]
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| H A D | clk_rk3368.c | 1142 u32 raw_value, delay_num; in rk3368_mmc_get_phase() local 1152 raw_value = readl(&cru->emmc_con[1]); in rk3368_mmc_get_phase() 1154 raw_value = readl(&cru->sdmmc_con[1]); in rk3368_mmc_get_phase() 1156 raw_value = readl(&cru->sdio0_con[1]); in rk3368_mmc_get_phase() 1158 raw_value >>= 1; in rk3368_mmc_get_phase() 1159 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk3368_mmc_get_phase() 1161 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk3368_mmc_get_phase() 1166 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk3368_mmc_get_phase() 1179 u32 raw_value, delay; in rk3368_mmc_set_phase() local 1201 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk3368_mmc_set_phase() [all …]
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| H A D | clk_rk1808.c | 1120 u32 raw_value, delay_num; in rk1808_mmc_get_phase() local 1130 raw_value = readl(&cru->emmc_con[1]); in rk1808_mmc_get_phase() 1132 raw_value = readl(&cru->sdmmc_con[1]); in rk1808_mmc_get_phase() 1134 raw_value = readl(&cru->sdio_con[1]); in rk1808_mmc_get_phase() 1136 raw_value >>= 1; in rk1808_mmc_get_phase() 1137 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk1808_mmc_get_phase() 1139 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk1808_mmc_get_phase() 1144 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk1808_mmc_get_phase() 1157 u32 raw_value, delay; in rk1808_mmc_set_phase() local 1179 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk1808_mmc_set_phase() [all …]
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| H A D | clk_rv1106.c | 1434 u32 raw_value = 0, delay_num; in rv1106_mmc_get_phase() local 1443 raw_value = readl(&priv->grf->emmc_con1); in rv1106_mmc_get_phase() 1445 raw_value = readl(&priv->grf->sdmmc_con1); in rv1106_mmc_get_phase() 1447 raw_value = readl(&priv->grf->sdio_con1); in rv1106_mmc_get_phase() 1449 raw_value >>= 1; in rv1106_mmc_get_phase() 1450 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rv1106_mmc_get_phase() 1452 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rv1106_mmc_get_phase() 1457 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rv1106_mmc_get_phase() 1469 u32 raw_value, delay; in rv1106_mmc_set_phase() local 1490 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rv1106_mmc_set_phase() [all …]
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| H A D | clk_rk3308.c | 1129 u32 raw_value, delay_num; in rockchip_mmc_get_phase() local 1139 raw_value = readl(&cru->emmc_con[1]); in rockchip_mmc_get_phase() 1141 raw_value = readl(&cru->sdmmc_con[1]); in rockchip_mmc_get_phase() 1143 raw_value &= ROCKCHIP_MMC_DEGREE_MASK; in rockchip_mmc_get_phase() 1144 degrees = (raw_value >> ROCKCHIP_MMC_DEGREE_OFFSET) * 90; in rockchip_mmc_get_phase() 1146 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rockchip_mmc_get_phase() 1151 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rockchip_mmc_get_phase() 1165 u32 raw_value, delay; in rockchip_mmc_set_phase() local 1187 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rockchip_mmc_set_phase() 1188 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase() [all …]
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| H A D | clk_rk3288.c | 1260 u32 raw_value, delay_num; in rockchip_mmc_get_phase() local 1270 raw_value = readl(&cru->cru_emmc_con[1]); in rockchip_mmc_get_phase() 1272 raw_value = readl(&cru->cru_sdmmc_con[1]); in rockchip_mmc_get_phase() 1274 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rockchip_mmc_get_phase() 1276 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rockchip_mmc_get_phase() 1281 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rockchip_mmc_get_phase() 1294 u32 raw_value, delay; in rockchip_mmc_set_phase() local 1316 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rockchip_mmc_set_phase() 1317 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase() 1318 raw_value |= nineties; in rockchip_mmc_set_phase() [all …]
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| H A D | clk_px30.c | 1494 u32 raw_value, delay_num; in rockchip_mmc_get_phase() local 1504 raw_value = readl(&cru->emmc_con[1]); in rockchip_mmc_get_phase() 1506 raw_value = readl(&cru->sdmmc_con[1]); in rockchip_mmc_get_phase() 1508 raw_value >>= 1; in rockchip_mmc_get_phase() 1509 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rockchip_mmc_get_phase() 1511 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rockchip_mmc_get_phase() 1516 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rockchip_mmc_get_phase() 1529 u32 raw_value, delay; in rockchip_mmc_set_phase() local 1551 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rockchip_mmc_set_phase() 1552 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase() [all …]
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| H A D | clk_rv1126.c | 1866 u32 raw_value, delay_num; in rv1126_mmc_get_phase() local 1875 raw_value = readl(&cru->emmc_con[1]); in rv1126_mmc_get_phase() 1877 raw_value = readl(&cru->sdmmc_con[1]); in rv1126_mmc_get_phase() 1879 raw_value = readl(&cru->sdio_con[1]); in rv1126_mmc_get_phase() 1881 raw_value >>= 1; in rv1126_mmc_get_phase() 1882 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rv1126_mmc_get_phase() 1884 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rv1126_mmc_get_phase() 1889 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rv1126_mmc_get_phase() 1902 u32 raw_value, delay; in rv1126_mmc_set_phase() local 1923 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rv1126_mmc_set_phase() [all …]
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| H A D | clk_rk3528.c | 1638 u32 raw_value = 0, delay_num; in rk3528_mmc_get_phase() local 1647 raw_value = readl(&priv->grf->sdmmc_con1); in rk3528_mmc_get_phase() 1651 raw_value >>= 1; in rk3528_mmc_get_phase() 1652 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk3528_mmc_get_phase() 1654 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk3528_mmc_get_phase() 1659 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk3528_mmc_get_phase() 1671 u32 raw_value, delay; in rk3528_mmc_set_phase() local 1692 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk3528_mmc_set_phase() 1693 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3528_mmc_set_phase() 1694 raw_value |= nineties; in rk3528_mmc_set_phase() [all …]
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| H A D | clk_rk3562.c | 1613 u32 raw_value, delay_num; in rk3562_mmc_get_phase() local 1622 raw_value = readl(&cru->sdmmc0_con[1]); in rk3562_mmc_get_phase() 1624 raw_value = readl(&cru->sdmmc1_con[1]); in rk3562_mmc_get_phase() 1628 raw_value &= ROCKCHIP_MMC_DEGREE_MASK; in rk3562_mmc_get_phase() 1629 degrees = (raw_value >> ROCKCHIP_MMC_DEGREE_SHIFT) * 90; in rk3562_mmc_get_phase() 1631 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk3562_mmc_get_phase() 1636 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk3562_mmc_get_phase() 1649 u32 raw_value, delay; in rk3562_mmc_set_phase() local 1670 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk3562_mmc_set_phase() 1671 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_SHIFT; in rk3562_mmc_set_phase() [all …]
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| H A D | clk_rk3568.c | 2907 u32 raw_value, delay_num; in rk3568_mmc_get_phase() local 2916 raw_value = readl(&cru->emmc_con[1]); in rk3568_mmc_get_phase() 2918 raw_value = readl(&cru->sdmmc0_con[1]); in rk3568_mmc_get_phase() 2920 raw_value = readl(&cru->sdmmc1_con[1]); in rk3568_mmc_get_phase() 2922 raw_value = readl(&cru->sdmmc2_con[1]); in rk3568_mmc_get_phase() 2924 raw_value >>= 1; in rk3568_mmc_get_phase() 2925 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk3568_mmc_get_phase() 2927 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk3568_mmc_get_phase() 2932 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk3568_mmc_get_phase() 2945 u32 raw_value, delay; in rk3568_mmc_set_phase() local [all …]
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| H A D | clk_rk3588.c | 1859 u32 raw_value, delay_num; in rk3588_mmc_get_phase() local 1868 raw_value = readl(&cru->sdmmc_con[1]); in rk3588_mmc_get_phase() 1872 raw_value >>= 1; in rk3588_mmc_get_phase() 1873 degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90; in rk3588_mmc_get_phase() 1875 if (raw_value & ROCKCHIP_MMC_DELAY_SEL) { in rk3588_mmc_get_phase() 1880 delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK); in rk3588_mmc_get_phase() 1893 u32 raw_value, delay; in rk3588_mmc_set_phase() local 1914 raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0; in rk3588_mmc_set_phase() 1915 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3588_mmc_set_phase() 1916 raw_value |= nineties; in rk3588_mmc_set_phase() [all …]
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