151 	u32 raw_value;  in rockchip_mmc_get_phase()  local
160 		raw_value = dwmci_readl(host, SDMMC_TIMING_CON1) >> 1;  in rockchip_mmc_get_phase()
162 		raw_value = dwmci_readl(host, SDMMC_TIMING_CON0) >> 1;  in rockchip_mmc_get_phase()
164 	degrees = (raw_value & ROCKCHIP_MMC_DEGREE_MASK) * 90;  in rockchip_mmc_get_phase()
165 	if (raw_value & ROCKCHIP_MMC_DELAY_SEL) {  in rockchip_mmc_get_phase()
169 		delay_num = (raw_value & ROCKCHIP_MMC_DELAYNUM_MASK);  in rockchip_mmc_get_phase()
183 	u32 raw_value;  in rockchip_mmc_set_phase()  local
237 	raw_value = delay_num ? ROCKCHIP_MMC_DELAY_SEL : 0;  in rockchip_mmc_set_phase()
238 	raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET;  in rockchip_mmc_set_phase()
239 	raw_value |= nineties;  in rockchip_mmc_set_phase()
242 		dwmci_writel(host, SDMMC_TIMING_CON1, HIWORD_UPDATE(raw_value, 0x07ff, 1));  in rockchip_mmc_set_phase()
244 		dwmci_writel(host, SDMMC_TIMING_CON0, HIWORD_UPDATE(raw_value, 0x07ff, 1));  in rockchip_mmc_set_phase()