| /rk3399_ARM-atf/plat/imx/imx9/common/ |
| H A D | imx9_bl31_setup.c | 34 static entry_point_info_t bl32_image_ep_info; variable
61 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
62 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
63 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
64 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
71 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
72 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
77 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
148 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/imx/imx8ulp/ |
| H A D | imx8ulp_bl31_setup.c | 50 static entry_point_info_t bl32_image_ep_info; variable
94 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
95 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
96 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
97 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
104 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
105 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
110 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
166 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | imx93_bl31_setup.c | 39 static entry_point_info_t bl32_image_ep_info; variable
80 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
81 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
82 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
83 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
92 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
96 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
150 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mn/ |
| H A D | imx8mn_bl31_setup.c | 86 static entry_point_info_t bl32_image_ep_info; variable
162 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
163 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
164 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
165 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
172 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
173 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
178 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
183 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
186 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
[all …]
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| /rk3399_ARM-atf/plat/marvell/armada/common/ |
| H A D | marvell_bl31_setup.c | 27 static entry_point_info_t bl32_image_ep_info; variable
50 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
79 SET_PARAM_HEAD(&bl32_image_ep_info, in marvell_bl31_early_platform_setup()
83 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in marvell_bl31_early_platform_setup()
84 bl32_image_ep_info.pc = BL32_BASE; in marvell_bl31_early_platform_setup()
85 bl32_image_ep_info.spsr = marvell_get_spsr_for_bl32_entry(); in marvell_bl31_early_platform_setup()
126 bl32_image_ep_info = *bl_params->ep_info; in marvell_bl31_early_platform_setup()
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| /rk3399_ARM-atf/plat/amd/versal2/ |
| H A D | bl31_setup.c | 39 static entry_point_info_t bl32_image_ep_info; variable
56 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
64 bl32_image_ep_info.pc = BL32_BASE; in bl31_set_default_config()
65 bl32_image_ep_info.spsr = arm_get_spsr(BL32_IMAGE_ID); in bl31_set_default_config()
69 bl32_image_ep_info.args.arg3 = XILINX_OF_BOARD_DTB_ADDR; in bl31_set_default_config()
74 bl32_image_ep_info.args.arg2 = XILINX_OF_BOARD_DTB_ADDR; in bl31_set_default_config()
75 bl32_image_ep_info.args.arg0 = SPMC_MANIFEST_DTB_ADDR; in bl31_set_default_config()
173 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
174 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
179 rc = transfer_list_populate_ep_info(&bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
[all …]
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| /rk3399_ARM-atf/plat/xilinx/zynqmp/ |
| H A D | bl31_zynqmp_setup.c | 31 static entry_point_info_t bl32_image_ep_info; variable
48 next_image_info = &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
60 bl32_image_ep_info.pc = BL32_BASE; in bl31_set_default_config()
61 bl32_image_ep_info.spsr = arm_get_spsr(BL32_IMAGE_ID); in bl31_set_default_config()
128 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
129 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
139 enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info, in bl31_early_platform_setup2()
146 if (bl32_image_ep_info.pc != 0U) { in bl31_early_platform_setup2()
147 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_bl31_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
89 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
90 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
91 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
197 if ((type == SECURE) && bl32_image_ep_info.pc) in bl31_plat_get_next_image_ep_info()
198 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mm/ |
| H A D | imx8mm_bl31_setup.c | 115 static entry_point_info_t bl32_image_ep_info; variable
178 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
179 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
180 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
181 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
188 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
189 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
194 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
198 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
201 &bl32_image_ep_info, in bl31_early_platform_setup2()
[all …]
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| /rk3399_ARM-atf/plat/ti/common/ |
| H A D | ti_bl31_setup.c | 26 static entry_point_info_t bl32_image_ep_info; variable
60 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
61 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
62 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in bl31_early_platform_setup2()
64 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
167 &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/nuvoton/npcm845x/ |
| H A D | npcm845x_bl31_setup.c | 34 static entry_point_info_t bl32_image_ep_info; variable
84 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
164 SET_PARAM_HEAD(&bl32_image_ep_info, in bl31_early_platform_setup2()
168 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
169 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
170 bl32_image_ep_info.spsr = arm_get_spsr(BL32_IMAGE_ID); in bl31_early_platform_setup2()
180 bl32_image_ep_info.args.arg0 = ARM_TRUSTED_SRAM_BASE + in bl31_early_platform_setup2()
250 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/qti/common/src/ |
| H A D | qti_bl31_setup.c | 33 static entry_point_info_t bl32_image_ep_info; variable
62 bl31_params_parse_helper(from_bl2, &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup()
101 qti_interrupt_svc_init(bl32_image_ep_info.pc != 0); in bl31_platform_setup()
119 ep = (type == SECURE) ? &bl32_image_ep_info : &bl33_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mq/ |
| H A D | imx8mq_bl31_setup.c | 68 static entry_point_info_t bl32_image_ep_info; variable
186 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
187 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
188 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
189 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
196 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
197 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
202 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
259 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mp/ |
| H A D | imx8mp_bl31_setup.c | 117 static entry_point_info_t bl32_image_ep_info; variable
187 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
188 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
189 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
190 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
197 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
198 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
203 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
207 &bl32_image_ep_info, &bl33_image_ep_info); in bl31_early_platform_setup2()
210 &bl32_image_ep_info, in bl31_early_platform_setup2()
[all …]
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| /rk3399_ARM-atf/plat/xilinx/versal/ |
| H A D | bl31_versal_setup.c | 32 static entry_point_info_t bl32_image_ep_info; variable
49 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
57 bl32_image_ep_info.pc = (uintptr_t)BL32_BASE; in bl31_set_default_config()
58 bl32_image_ep_info.spsr = (uint32_t)arm_get_spsr(BL32_IMAGE_ID); in bl31_set_default_config()
116 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
117 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
132 enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info, in bl31_early_platform_setup2()
145 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_bl31_setup.c | 44 static entry_point_info_t bl32_image_ep_info; variable
153 secure_tl, &bl32_image_ep_info); in bl31_plat_get_next_image_ep_info()
155 next_image_info = &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
221 bl32_image_ep_info = *ep; in arm_bl31_early_platform_setup()
241 SET_PARAM_HEAD(&bl32_image_ep_info, in arm_bl31_early_platform_setup()
245 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in arm_bl31_early_platform_setup()
246 bl32_image_ep_info.pc = BL32_BASE; in arm_bl31_early_platform_setup()
247 bl32_image_ep_info.spsr = arm_get_spsr(BL32_IMAGE_ID); in arm_bl31_early_platform_setup()
250 bl32_image_ep_info.args.arg0 = ARM_SPMC_MANIFEST_BASE; in arm_bl31_early_platform_setup()
301 bl32_image_ep_info = *bl_params->ep_info; in arm_bl31_early_platform_setup()
[all …]
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_bl31_setup.c | 20 static entry_point_info_t bl32_image_ep_info; variable
44 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
66 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
136 SET_PARAM_HEAD(&bl32_image_ep_info, in bl31_early_platform_setup2()
140 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
141 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
142 bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry(); in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/brcm/common/ |
| H A D | brcm_bl31_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
65 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
103 SET_PARAM_HEAD(&bl32_image_ep_info, in brcm_bl31_early_platform_setup()
107 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in brcm_bl31_early_platform_setup()
108 bl32_image_ep_info.pc = BL32_BASE; in brcm_bl31_early_platform_setup()
109 bl32_image_ep_info.spsr = brcm_get_spsr_for_bl32_entry(); in brcm_bl31_early_platform_setup()
167 bl32_image_ep_info = *bl_params->ep_info; in brcm_bl31_early_platform_setup()
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| /rk3399_ARM-atf/plat/xilinx/versal_net/ |
| H A D | bl31_versal_net_setup.c | 30 static entry_point_info_t bl32_image_ep_info; variable
52 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
60 bl32_image_ep_info.pc = BL32_BASE; in bl31_set_default_config()
61 bl32_image_ep_info.spsr = arm_get_spsr(BL32_IMAGE_ID); in bl31_set_default_config()
147 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
148 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
161 xbl_ret = xbl_handover(&bl32_image_ep_info, &bl33_image_ep_info, in bl31_early_platform_setup2()
188 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_bl31_setup.c | 21 static entry_point_info_t bl32_image_ep_info; variable
28 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
48 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/st/stm32mp2/ |
| H A D | bl31_plat_setup.c | 18 static entry_point_info_t bl32_image_ep_info; variable
107 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
110 bl32_image_ep_info.args.arg3 = arg2; in bl31_early_platform_setup2()
146 next_image_info = &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
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| /rk3399_ARM-atf/plat/amlogic/axg/ |
| H A D | axg_bl31_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
38 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
95 bl32_image_ep_info.args.arg0 = MODE_RW_32; in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/hisilicon/poplar/ |
| H A D | bl31_plat_setup.c | 32 static entry_point_info_t bl32_image_ep_info; variable
47 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
96 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/amlogic/g12a/ |
| H A D | g12a_bl31_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
38 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
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| /rk3399_ARM-atf/plat/rpi/rpi3/ |
| H A D | rpi3_bl31_setup.c | 24 static entry_point_info_t bl32_image_ep_info; variable
40 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
98 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
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