| #
f8a9aa10 |
| 28-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge changes from topic "mb/lfa-rmm-test" into integration
* changes: fix(rmmd): avoid race conditions in CPU finish fix(arm): move lfa componet header to common and fix the helper chore(lfa)
Merge changes from topic "mb/lfa-rmm-test" into integration
* changes: fix(rmmd): avoid race conditions in CPU finish fix(arm): move lfa componet header to common and fix the helper chore(lfa): rename component_id to lfa_component_id
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| #
716deb86 |
| 22-Oct-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(arm): move lfa componet header to common and fix the helper
Move the FVP LFA component definitions to include/plat/arm/common/ so they can be shared by all Arm platforms, and update include path
fix(arm): move lfa componet header to common and fix the helper
Move the FVP LFA component definitions to include/plat/arm/common/ so they can be shared by all Arm platforms, and update include paths accordingly.
On FVP, rename the input parameter to lfa_component_id to match the function declaration, and fix callers to pass the component ID (not image_id) to the prime-complete helper.
Change-Id: Ia1485096819d6523c4bee14c602cbde3c6e144ef Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| #
92c0f3ba |
| 10-Oct-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "rmm-lfa" into integration
* changes: feat(arm): handle RMM ep_info during LFA feat(lfa): add helper to check LFA prime completion status feat(lfa): enable LFA of RMM
Merge changes from topic "rmm-lfa" into integration
* changes: feat(arm): handle RMM ep_info during LFA feat(lfa): add helper to check LFA prime completion status feat(lfa): enable LFA of RMM chore(lfa): use standard int return type for prime/activate callbacks feat(rmmd): add warm reset helpers for primary and secondary CPUs
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| #
4ea0ebc2 |
| 26-Aug-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(arm): handle RMM ep_info during LFA
Update the logic for next image handoff to correctly manage the RMM entry point information when LFA is in progress. This ensures control is passed back into
feat(arm): handle RMM ep_info during LFA
Update the logic for next image handoff to correctly manage the RMM entry point information when LFA is in progress. This ensures control is passed back into RMM during the activation sequence.
This change only affects during LFA run, normal boot behavior is unchanged.
Change-Id: I8f85e9a7e0a7e9dab196c69ecf55abb9e7717982 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| #
e8460bd9 |
| 02-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(arm): don't override the gic redistributor frames" into integration
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| #
1d59d686 |
| 25-Sep-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(arm): don't override the gic redistributor frames
Patch 75170704c made an oversight - it would provide a default value for the gicr_frames variable but would always set to it, regardless of whet
fix(arm): don't override the gic redistributor frames
Patch 75170704c made an oversight - it would provide a default value for the gicr_frames variable but would always set to it, regardless of whether the platform might want to use something different. The thinking was to provide a default and then let each platform override it, however the order was swapped.
To fix this, put the gic_set_gicr_frames() in bl31_platform_setup() rather than arm_bl31_platform_setup(). This way, platforms that use the default can still enjoy it automatically pulled in from common code, platforms that need fully custom gicr_frames can simply set it, and platforms that override bl31_platform_setup() for unrelated reasons only have to redo the call to gic_set_gicr_frames(). This has a tiny benefit over the old approach in that there will never be 2 gicr_frames arrays.
Change-Id: I734737d3bd37ddbb3286abcdd92c88676c68cdc3 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
ddc1fcee |
| 26-Sep-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(arm/common): gate coherency behind flag" into integration
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| #
36fbcf4d |
| 17-Sep-2025 |
Ahmed Azeem <ahmed.azeem@arm.com> |
refactor(arm/common): gate coherency behind flag
Introduce a macro guard so platform coherency functions are only compiled when HW_ASSISTED_COHERENCY is 0 (disabled). Many platforms enable HW-assist
refactor(arm/common): gate coherency behind flag
Introduce a macro guard so platform coherency functions are only compiled when HW_ASSISTED_COHERENCY is 0 (disabled). Many platforms enable HW-assisted coherency by default, so compiling empty definitions is unnecessary.
This refactor removes those empty functions for Arm CSS platforms.
Change-Id: I102ead46960e9da2d8b968f60cbfd3e5e5da1096 Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>
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| #
7924b69f |
| 03-Sep-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(arm): unify Linux kernel as BL33 handling" into integration
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| #
2f5fd826 |
| 08-Oct-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): unify Linux kernel as BL33 handling
Streamlines and unifies how Arm platforms pass arguments to the Linux kernel when it is loaded as BL33. It replaces the FVP specific macro `FVP_HW_CONF
feat(arm): unify Linux kernel as BL33 handling
Streamlines and unifies how Arm platforms pass arguments to the Linux kernel when it is loaded as BL33. It replaces the FVP specific macro `FVP_HW_CONFIG_ADDR` with a common macro `ARM_HW_CONFIG_ADDR` for accessing the device tree blob base address.
For FVP the DT address is set to use `ARM_PRELOADED_DTB_BASE` if provided, falling back to a default address otherwise.
This provides a consistent mechanism for Arm platforms to define and override the DTB base address used during kernel handoff. It reduces the chance of misconfiguration, and simplifies platform integration.
Change-Id: Ib668dbb1de9d42cf41c0b0ee9a316f054891752a Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
4ee9e901 |
| 29-Aug-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(arm): re-enable console by default in BL31" into integration
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| #
de464057 |
| 21-Aug-2025 |
Chris Kay <chris.kay@arm.com> |
fix(arm): re-enable console by default in BL31
In c997a8d, the common `arm_bl31_early_platform_setup` function underwent a consolidation of two large preprocessor branches that were conditional on w
fix(arm): re-enable console by default in BL31
In c997a8d, the common `arm_bl31_early_platform_setup` function underwent a consolidation of two large preprocessor branches that were conditional on whether or not Transfer List support is enabled.
This function would initialise the console via `arm_console_boot_init` *only* if Transfer List support was disabled. During the consolidation, this call was removed, such that the behaviour was the same for both branches.
However, the common `bl31_early_platform_setup2` implementation was not updated to reflect this change, and so platforms that a) relied on this common implementation and b) did not enable Transfer List support no longer initialise the console in BL31.
This change ensures that the common implementation correctly initialises the console during early BL31 boot.
Change-Id: I332af3932ac70382fbf7a5434c0008807f38f86c Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
3b9411f3 |
| 19-Aug-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(bl31): remove incorrect asserts" into integration
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| #
3e1d33d6 |
| 06-Aug-2025 |
Alexandre Gonzalo <alexandre.gonzalo@arm.com> |
fix(bl31): remove incorrect asserts
When RESET_TO_BL31 is defined, BL31 is the reset vector and no parameters are provided by a previous bootloader. Therefore, the arguments arg0 to arg3 passed to a
fix(bl31): remove incorrect asserts
When RESET_TO_BL31 is defined, BL31 is the reset vector and no parameters are provided by a previous bootloader. Therefore, the arguments arg0 to arg3 passed to arm_bl31_early_platform_setup() must be ignored. They come directly from the BL31 entrypoint. The GP registers reset to an architecturally unknown value so are not necessarily initialized to zero.
Signed-off-by: Alexandre Gonzalo <alexandre.gonzalo@arm.com> Change-Id: I38dde35145f2bd27fe9645906df192b138984c1d
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| #
baf2e39f |
| 08-Aug-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration
* changes: refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3 fix(gicv3): remove plat_gicv3_base.c ref
Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration
* changes: refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3 fix(gicv3): remove plat_gicv3_base.c refactor(versal-net): use the generic GIC driver
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| #
75170704 |
| 29-Jul-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
The GICv3 driver has 2 methods of discovering the redistributors: a) via setting gicr_base - done at boot and assumes
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
The GICv3 driver has 2 methods of discovering the redistributors: a) via setting gicr_base - done at boot and assumes all GICR frames are contiguous. This is the original method.
b) via gicv3_rdistif_probe() - called from platform code and requires gicr_base == 0. It relaxes the requirement for frames to be contiguous, like in a multichip configuration, and defers the discovery to core bringup. This was introduced later.
Configurations possible with option a) are also possible with option b) with only slightly different behaviour. USE_GIC_DRIVER=3 inherited option b) from plat_gicv3_base.c and as such option a) is unusable. However, it is unclear from code how this should be used. Clarify this by requiring platforms initialise with gic_set_gicr_frames() and adding relevant comments.
Also rename plat_arm_override_gicr_frames() to gic_set_gicr_frames() as this is not plat arm specific and a part of the generic GIC driver.
Change-Id: I61d77211f8e65dc54cf9904069b500d26a06b5a5 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
813bf1a0 |
| 04-Aug-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topic "hm/dt" into integration
* changes: refactor(arm): unify SPSR retrieval logic feat(fvp): enable kernel dt convention
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| #
01907f3f |
| 04-Jul-2025 |
Harrison Mutai <harrison.mutai@arm.com> |
refactor(arm): unify SPSR retrieval logic
Consolidate platform-specific SPSR setup logic into a single arm_get_spsr() function that accepts an image_id to select between BL32 and BL33. This reduces
refactor(arm): unify SPSR retrieval logic
Consolidate platform-specific SPSR setup logic into a single arm_get_spsr() function that accepts an image_id to select between BL32 and BL33. This reduces duplication and simplifies control over SPSR generation for later stages, particularly BL33.
The SPD remains responsible for setting the SPSR for BL32.
Change-Id: Ibbba708d607e7676989f5c7ceffe33d7bb2195f1 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
8946bb03 |
| 08-Jul-2025 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(fvp): enable kernel dt convention
Enable USE_KERNEL_DT_CONVENTION for the FVP platform to pass the DT blob (DTB) in x0 to BL33. This aligns with the Linux boot protocol as described in Document
feat(fvp): enable kernel dt convention
Enable USE_KERNEL_DT_CONVENTION for the FVP platform to pass the DT blob (DTB) in x0 to BL33. This aligns with the Linux boot protocol as described in Documentation/arm64/booting.rst.
In addition:
- Clean up legacy ARM_LINUX_KERNEL_AS_BL33 handling since USE_KERNEL_DT_CONVENTION now implies this mode for DT handoff. - Override args.arg0 for BL33 to point to ARM_PRELOADED_DTB_BASE in RESET_TO_BL31. - Skip setting the primary MPID in x0 when using this convention.
Change-Id: Ieea8cfe68104b82038b9311613abf13afe7b48f1 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
d90bb650 |
| 23-Jun-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "build(handoff)!: switch to LibTL submodule" into integration
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| #
b5d0740e |
| 13-May-2025 |
Harrison Mutai <harrison.mutai@arm.com> |
build(handoff)!: switch to LibTL submodule
Removes in-tree Transfer List implementation and updates all references to use the external LibTL submodule. Updates include paths, Makefile macros, and pl
build(handoff)!: switch to LibTL submodule
Removes in-tree Transfer List implementation and updates all references to use the external LibTL submodule. Updates include paths, Makefile macros, and platform integration logic to link with LibTL as a static library.
If you cloned TF-A without the `--recurse-submodules` flag, you can ensure that this submodule is present by running:
git submodule update --init --recursive
BREAKING-CHANGE: LibTL is now included in TF-A as a submodule. Please run `git submodule update --init --recursive` if you encounter issues after migrating to the latest version of TF-A.
Change-Id: I1fa31f7b730066c27985d968698e553b00b07c38 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
66fb7ee4 |
| 28-Apr-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topic "hm/handoff-mb" into integration
* changes: feat(arm): support boot info handoff and event log fix(arm): update tsp_early_platform_setup prototype fix(xilinx): update
Merge changes from topic "hm/handoff-mb" into integration
* changes: feat(arm): support boot info handoff and event log fix(arm): update tsp_early_platform_setup prototype fix(xilinx): update tsp_early_platform_setup prototype fix(socionext): update tsp_early_platform_setup prototype fix(msm8916): update tsp_early_platform_setup prototype feat(tsp): cascade boot arguments to platforms feat(fvp): port event log to firmware handoff feat(arm): port event log to firmware handoff feat(fvp): increase bl2 mmap len for handoff feat(measured-boot): add fw handoff event log utils
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| #
a852fa1d |
| 21-Feb-2025 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): support boot info handoff and event log
Add support for processing boot arguments via Firmware Handoff on Arm platforms. Update platform hooks to pass boot info to BL31 and BL32 stages.
feat(arm): support boot info handoff and event log
Add support for processing boot arguments via Firmware Handoff on Arm platforms. Update platform hooks to pass boot info to BL31 and BL32 stages.
Enable parsing and dumping of an event log from the transfer list when MEASURED_BOOT is enabled. This allows measured boot testing in the secure world.
Also update BL32 sources to include event log support when TSPD and measured boot are both enabled.
Change-Id: Ia310696d0e6cfe93d756bfb075e9fda08342c0a1 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
b30d9043 |
| 13-Dec-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): port event log to firmware handoff
Support handing off the event log to both the secure and non-secure worlds using the firmware handoff framework. This also needs us to increase the maxi
feat(arm): port event log to firmware handoff
Support handing off the event log to both the secure and non-secure worlds using the firmware handoff framework. This also needs us to increase the maximum allocation for TB-FW configuration to accommodate trusted boot entries.
Change-Id: I9f622b10c3cec2a9ab069f7848b00b1b635bd029 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
139a5d05 |
| 18-Apr-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes: chore: fix preprocessor checks refactor: convert arm platforms to use the generic GIC driver refacto
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes: chore: fix preprocessor checks refactor: convert arm platforms to use the generic GIC driver refactor(gic): promote most of the GIC driver to common code refactor: make arm_gicv2.c and arm_gicv3.c common refactor(fvp): use more arm generic code for gicv3
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