Merge "fix(versal-net): fix coverity violation prevent buffer overrun" into integration

fix(versal-net): fix coverity violation prevent buffer overrun

Coverity reported potential memory corruption issues in
bl31_early_platform_setup2() (CIDs 487973 and 487972):

- CID 487973 (ARRAY_VS_

fix(versal-net): fix coverity violation prevent buffer overrun

Coverity reported potential memory corruption issues in
bl31_early_platform_setup2() (CIDs 487973 and 487972):

- CID 487973 (ARRAY_VS_SINGLETON): "&boot_mode" was passed to
get_boot_mode(), which treats the argument as an array. This could
lead to misinterpretation of adjacent memory.
- CID 487972 (OVERRUN): Passing "&boot_mode" (a single 4-byte element)
allowed get_boot_mode() to access out-of-bounds indices, resulting in
a possible buffer overrun.

Changed boot_mode from a single variable to an array sized according
to the return payload, preventing singleton pointer violation.

Change-Id: I53944db10b694d1599da0e5b1fbd30a97e83803c
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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Merge "fix(versal-net): add fallback on handoff failure" into integration

fix(versal-net): add fallback on handoff failure

On the Versal-Net platform, booting can fail during ELF loading due to
the absence of a PLM handoff, preventing the system from booting
further.

To

fix(versal-net): add fallback on handoff failure

On the Versal-Net platform, booting can fail during ELF loading due to
the absence of a PLM handoff, preventing the system from booting
further.

To address this, a fallback mechanism has been introduced that allows
the boot process to continue even if the PLM handoff is not provided
only in debug builds with jtag boot mode.

Change-Id: Ib8d92ab8400b7a63b05ae8c77b40b30fe7abaab8
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration

* changes:
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
fix(gicv3): remove plat_gicv3_base.c
ref

Merge changes I61d77211,I9cb5c1fa,I8e8a92fd into integration

* changes:
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
fix(gicv3): remove plat_gicv3_base.c
refactor(versal-net): use the generic GIC driver

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refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3

The GICv3 driver has 2 methods of discovering the redistributors:
a) via setting gicr_base - done at boot and assumes

refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3

The GICv3 driver has 2 methods of discovering the redistributors:
a) via setting gicr_base - done at boot and assumes all GICR frames are
contiguous. This is the original method.

b) via gicv3_rdistif_probe() - called from platform code and requires
gicr_base == 0. It relaxes the requirement for frames to be
contiguous, like in a multichip configuration, and defers the
discovery to core bringup. This was introduced later.

Configurations possible with option a) are also possible with option b)
with only slightly different behaviour. USE_GIC_DRIVER=3 inherited
option b) from plat_gicv3_base.c and as such option a) is unusable.
However, it is unclear from code how this should be used. Clarify this
by requiring platforms initialise with gic_set_gicr_frames() and
adding relevant comments.

Also rename plat_arm_override_gicr_frames() to gic_set_gicr_frames() as
this is not plat arm specific and a part of the generic GIC driver.

Change-Id: I61d77211f8e65dc54cf9904069b500d26a06b5a5
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(versal-net): use the generic GIC driver

With the introduction of USE_GIC_DRIVER, platforms no longer have to do
their own GIC management for basic PSCI-related operations. Previously a
half

refactor(versal-net): use the generic GIC driver

With the introduction of USE_GIC_DRIVER, platforms no longer have to do
their own GIC management for basic PSCI-related operations. Previously a
half-measure was possible by using plat_gicv3_base.c to get semi-generic
helpers which versal_net uses.

Since USE_GIC_DRIVER is based on plat_gicv3_base.c, convert the platform
to use that so its code is more generic. Expected benefits are slightly
better performance around calling the gic hooks on cpu suspend and less
platform code.

Change-Id: I8e8a92fd4111e4a83c7a34bc5255d924bc54e769
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes from topic "hm/dt" into integration

* changes:
refactor(arm): unify SPSR retrieval logic
feat(fvp): enable kernel dt convention

refactor(arm): unify SPSR retrieval logic

Consolidate platform-specific SPSR setup logic into a single
arm_get_spsr() function that accepts an image_id to select between BL32
and BL33. This reduces

refactor(arm): unify SPSR retrieval logic

Consolidate platform-specific SPSR setup logic into a single
arm_get_spsr() function that accepts an image_id to select between BL32
and BL33. This reduces duplication and simplifies control over SPSR
generation for later stages, particularly BL33.

The SPD remains responsible for setting the SPSR for BL32.

Change-Id: Ibbba708d607e7676989f5c7ceffe33d7bb2195f1
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge "feat(versal-net): add SDEI support" into integration

feat(versal-net): add SDEI support

Add basic SDEI support with following configuration settings:
- SGI 8 as the source IRQ.
- Special Private event 0.
- One private and shared dynamic event used in

feat(versal-net): add SDEI support

Add basic SDEI support with following configuration settings:
- SGI 8 as the source IRQ.
- Special Private event 0.
- One private and shared dynamic event used in tftf verification
for SDEI support.
- SDEI support is off by default.

Change-Id: I7cfafb84c3fc053ec67258698cf749e63486fe18
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

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Merge changes from topic "xlnx_fix_plat_single_ret" into integration

* changes:
fix(versal2): modify function to have single return
fix(versal-net): modify function to have single return
fix(v

Merge changes from topic "xlnx_fix_plat_single_ret" into integration

* changes:
fix(versal2): modify function to have single return
fix(versal-net): modify function to have single return
fix(versal): modify function to have single return
fix(xilinx): modify function to have single return
fix(zynqmp): modify function to have single return
fix(versal-net): add unsigned suffix to match data type
fix(versal): add unsigned suffix to match data type
fix(versal2): add missing curly braces
fix(versal-net): add missing curly braces
fix(zynqmp): add missing curly braces

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Merge "fix(xilinx): dcc console tests failing" into integration

fix(versal-net): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to stor

fix(versal-net): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ib8b3339f32031a3657f6c349763a20a99fd828e7
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): dcc console tests failing

The commit a6485b2b3b2c ("refactor(delay-timer): add timer
callback functions") is breaking DCC console due to uninitialized
timer ops structure. Fix it by mov

fix(xilinx): dcc console tests failing

The commit a6485b2b3b2c ("refactor(delay-timer): add timer
callback functions") is breaking DCC console due to uninitialized
timer ops structure. Fix it by moving generic delay timer init
prior to console setup to make sure that time is setup before DCC
console setup.

Fixes: a6485b2b3b2c ("refactor(delay-timer): add timer callback
functions")

Change-Id: I67910332773741c0b08f02feb232efab6356db12
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-

Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal2): typecast expressions to match data type
fix(versal-net): typecast expressions to match data type
fix(versal): typecast expressions to match data type
fix(xilinx): typecast expressions to match data type
fix(zynqmp): typecast expressions to match data type
fix(zynqmp): align essential type categories
fix(zynqmp): typecast expression to match data type
fix(xilinx): typecast expression to match data type

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fix(versal-net): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of

fix(versal-net): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: Ie2d32d5554d251cde8a9c8b7c7a85666ea505a15
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal-net): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have

fix(versal-net): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential type
category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I5add78285ff0e48aa6c0fb639e7e2924f5bf9000
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_plat_boolc_fn_ret" into integration

* changes:
fix(xilinx): avoid altering function parameters
fix(versal-net): ignore the unused function return value
fix(z

Merge changes from topic "xlnx_fix_plat_boolc_fn_ret" into integration

* changes:
fix(xilinx): avoid altering function parameters
fix(versal-net): ignore the unused function return value
fix(zynqmp): ignore the unused function return value
fix(versal-net): modify conditions to have boolean type
fix(versal): modify conditions to have boolean type
fix(xilinx): modify conditions to have boolean type
fix(zynqmp): modify conditions to have boolean type

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fix(versal-net): ignore the unused function return value

This correct MISRA violation C2012-17.7:
The value returned by a function having non-void return type shall
be used.
Typecast the function ca

fix(versal-net): ignore the unused function return value

This correct MISRA violation C2012-17.7:
The value returned by a function having non-void return type shall
be used.
Typecast the function call to void to discard the return value.

Change-Id: I670b476ba16e791e46aaa00feca991e1a4fff227
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_plat_const_preced" into integration

* changes:
fix(versal2): explicitly check operators precedence
fix(versal-net): explicitly check operators precedence
fix

Merge changes from topic "xlnx_fix_plat_const_preced" into integration

* changes:
fix(versal2): explicitly check operators precedence
fix(versal-net): explicitly check operators precedence
fix(versal): explicitly check operators precedence
fix(xilinx): explicitly check operators precedence
fix(zynqmp): explicitly check operators precedence
fix(versal2): add const qualifier
fix(versal): add const qualifier
fix(zynqmp): add const qualifier

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fix(versal-net): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpressio

fix(versal-net): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I3c30f5029628f8b297c08443a2c6c8bbf2063d29
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_unused_param" into integration

* changes:
fix(versal2): declare unused parameters as void
fix(versal-net): declare unused parameters as void
fix(versal): dec

Merge changes from topic "xlnx_fix_unused_param" into integration

* changes:
fix(versal2): declare unused parameters as void
fix(versal-net): declare unused parameters as void
fix(versal): declare unused parameters as void
fix(xilinx): declare unused parameters as void
fix(zynqmp): declare unused parameters as void

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fix(versal-net): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Chang

fix(versal-net): declare unused parameters as void

This corrects the MISRA violation C2012-2.7:
There should be no unused parameters in functions.
Declared unused function parameters as void.

Change-Id: I20ef3be35f88649979d577ec8be4357813d4c1b7
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge "fix(versal-net): remove check for bl32 load address" into integration