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Searched refs:sdhci_writew (Results 1 – 25 of 29) sorted by relevance

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/OK3568_Linux_fs/u-boot/drivers/mmc/
H A Dsdhci.c254 sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
257 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
258 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
270 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND);
322 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
337 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
357 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
474 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
597 sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), SDHCI_BLOCK_SIZE);
599 sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE);
[all …]
H A Drockchip_sdhci.c223 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in rockchip_emmc_set_clock()
276 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in rockchip_emmc_set_clock()
339 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in dwcmshc_sdhci_emmc_set_clock()
465 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in dwcmshc_sdhci_set_ios_post()
470 sdhci_writew(host, ctrl, DWCMSHC_EMMC_CONTROL); in dwcmshc_sdhci_set_ios_post()
H A Dxenon_sdhci.c237 sdhci_writew(host, var, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_set()
251 sdhci_writew(host, var, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_set()
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Dsdhci-cns3xxx.c32 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cns3xxx_set_clock()
59 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cns3xxx_set_clock()
73 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cns3xxx_set_clock()
H A Dsdhci-pci-arasan.c111 sdhci_writew(host, data, PHY_DAT_REG); in arasan_phy_write()
112 sdhci_writew(host, (PHY_WRITE | offset), PHY_ADDR_REG); in arasan_phy_write()
120 sdhci_writew(host, 0, PHY_DAT_REG); in arasan_phy_read()
121 sdhci_writew(host, offset, PHY_ADDR_REG); in arasan_phy_read()
H A Dsdhci-milbeaut.c94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
193 sdhci_writew(host, ctl, F_SDH30_AHB_CONFIG); in sdhci_milbeaut_vendor_init()
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
H A Dsdhci-sprd.c166 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
175 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
221 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock()
266 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
345 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
512 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
H A Dsdhci-pci-gli.c216 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
236 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
378 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock()
508 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock()
651 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
673 sdhci_writew(host, GLI_9763E_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_enable()
699 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_gl9763e_cqe_post_disable()
H A Dsdhci-pci-o2micro.c197 sdhci_writew(host, reg, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
326 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
368 sdhci_writew(host, scratch, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
515 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
520 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
534 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock()
H A Dsdhci.c138 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
308 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
1064 sdhci_writew(host, in sdhci_set_block_info()
1074 sdhci_writew(host, 0, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1075 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1077 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1402 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_auto_cmd_select()
1428 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
1432 sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 | in sdhci_set_transfer_mode()
1455 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
[all …]
H A Dsdhci-of-dwcmshc.c206 sdhci_writew(host, ctrl, priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL); in dwcmshc_set_uhs_signaling()
211 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
278 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in dwcmshc_rk3568_set_clock()
788 sdhci_writew(host, data, SDHCI_CLOCK_CONTROL); in dwcmshc_runtime_suspend()
800 sdhci_writew(host, data, SDHCI_CLOCK_CONTROL); in dwcmshc_runtime_resume()
H A Dsdhci-of-at91.c78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
H A Dsdhci_f_sdh30.c68 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
160 sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
H A Dsdhci-s3c.c379 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
388 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
398 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
414 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
H A Dsdhci-pci-dwc-mshc.c70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
H A Dsdhci-brcmstb.c87 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
121 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
H A Dsdhci-xenon.c218 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
288 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
H A Dsdhci.h673 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
720 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
H A Dsdhci-xenon-phy.c611 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
635 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
H A Dsdhci-tegra.c256 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
1188 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in tegra_cqhci_writel()
1238 sdhci_writew(host, SDHCI_TEGRA_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_enable()
1321 sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); in sdhci_tegra_cqe_post_disable()
H A Dsdhci-of-aspeed.c63 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
H A Dsdhci-acpi.c596 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
600 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
H A Dsdhci-st.c304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
H A Dsdhci-pxav3.c294 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
/OK3568_Linux_fs/u-boot/include/
H A Dsdhci.h308 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function
355 static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg) in sdhci_writew() function

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