Home
last modified time | relevance | path

Searched refs:CLK_PWM0 (Results 1 – 25 of 33) sorted by relevance

12

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dpwm-sprd.txt27 clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
31 assigned-clocks = <&aon_clk CLK_PWM0>,
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dpxa27x.dtsi50 clocks = <&clks CLK_PWM0>;
64 clocks = <&clks CLK_PWM0>;
H A Dpxa3xx.dtsi225 clocks = <&clks CLK_PWM0>;
241 clocks = <&clks CLK_PWM0>;
H A Dpxa25x.dtsi68 clocks = <&clks CLK_PWM0>;
H A Drv1126.dtsi963 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
974 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
985 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
996 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dactions,s500-cmu.h43 #define CLK_PWM0 23 macro
H A Dpxa-clock.h47 #define CLK_PWM0 37 macro
H A Dactions,s700-cmu.h66 #define CLK_PWM0 43 macro
H A Dactions,s900-cmu.h68 #define CLK_PWM0 50 macro
H A Dsprd,sc9863a-clk.h120 #define CLK_PWM0 15 macro
H A Dsprd,sc9860-clk.h124 #define CLK_PWM0 18 macro
H A Drv1126-cru.h29 #define CLK_PWM0 15 macro
H A Drk3528-cru.h125 #define CLK_PWM0 127 macro
H A Drk3568-cru.h26 #define CLK_PWM0 13 macro
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3528.c782 case CLK_PWM0: in rk3528_pwm_get_clk()
824 case CLK_PWM0: in rk3528_pwm_set_clk()
1384 case CLK_PWM0: in rk3528_clk_get_rate()
1502 case CLK_PWM0: in rk3528_clk_set_rate()
1928 rk3528_pwm_set_clk(priv, CLK_PWM0, 24000000); in rk3528_clk_init()
H A Dclk_rv1126.c267 case CLK_PWM0: in rv1126_pwm_get_pmuclk()
295 case CLK_PWM0: in rv1126_pwm_set_pmuclk()
415 case CLK_PWM0: in rv1126_pmuclk_get_rate()
454 case CLK_PWM0: in rv1126_pmuclk_set_rate()
H A Dclk_rk3568.c290 case CLK_PWM0: in rk3568_pwm_get_pmuclk()
313 case CLK_PWM0: in rk3568_pwm_set_pmuclk()
396 case CLK_PWM0: in rk3568_pmuclk_get_rate()
440 case CLK_PWM0: in rk3568_pmuclk_set_rate()
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drv1126-cru.h29 #define CLK_PWM0 15 macro
H A Drk3528-cru.h129 #define CLK_PWM0 127 macro
H A Drk3568-cru.h26 #define CLK_PWM0 13 macro
/OK3568_Linux_fs/kernel/drivers/clk/actions/
H A Dowl-s500.c483 [CLK_PWM0] = &pwm0_clk.common.hw,
H A Dowl-s700.c533 [CLK_PWM0] = &clk_pwm0.common.hw,
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drv1126.dtsi769 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
780 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
791 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
802 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
H A Drk3528.dtsi1541 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
1552 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
1563 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
1576 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3528.dtsi1801 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
1812 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
1823 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;
1836 clocks = <&cru CLK_PWM0>, <&cru PCLK_PWM0>;

12