Home
last modified time | relevance | path

Searched refs:CLK_I2C7 (Results 1 – 21 of 21) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dexynos5250.h104 #define CLK_I2C7 301 macro
H A Dexynos4.h162 #define CLK_I2C7 324 macro
H A Dexynos3250.h213 #define CLK_I2C7 207 macro
H A Drk3528-cru.h323 #define CLK_I2C7 425 macro
H A Drk3588-cru.h152 #define CLK_I2C7 147 macro
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3528.c599 case CLK_I2C7: in rk3528_i2c_get_clk()
685 case CLK_I2C7: in rk3528_i2c_set_clk()
1377 case CLK_I2C7: in rk3528_clk_get_rate()
1495 case CLK_I2C7: in rk3528_clk_set_rate()
H A Dclk_rk3588.c414 case CLK_I2C7: in rk3588_i2c_get_clk()
473 case CLK_I2C7: in rk3588_i2c_set_clk()
1575 case CLK_I2C7: in rk3588_clk_get_rate()
1724 case CLK_I2C7: in rk3588_clk_set_rate()
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3528-cru.h327 #define CLK_I2C7 425 macro
H A Drk3588-cru.h152 #define CLK_I2C7 147 macro
/OK3568_Linux_fs/kernel/drivers/clk/samsung/
H A Dclk-exynos5250.c585 GATE(CLK_I2C7, "i2c7", "div_aclk66", GATE_IP_PERIC, 13, 0, 0),
H A Dclk-exynos3250.c655 GATE(CLK_I2C7, "i2c7", "div_aclk_100", GATE_IP_PERIL, 13, 0, 0),
H A Dclk-exynos4.c872 GATE(CLK_I2C7, "i2c7", "aclk100", GATE_IP_PERIL, 13,
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3528.c823 COMPOSITE_NODIV(CLK_I2C7, "clk_i2c7", mux_200m_100m_50m_24m_p, 0,
H A Dclk-rk3588.c1132 COMPOSITE_NODIV(CLK_I2C7, "clk_i2c7", mux_200m_100m_p, 0,
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dexynos3250.dtsi630 clocks = <&cmu CLK_I2C7>;
H A Dexynos4.dtsi590 clocks = <&clock CLK_I2C7>;
H A Dexynos5250.dtsi445 clocks = <&clock CLK_I2C7>;
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3528.dtsi1525 clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;
H A Drk3588s.dtsi2166 clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3528.dtsi1785 clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;
H A Drk3588s.dtsi6438 clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;