Home
last modified time | relevance | path

Searched full:grf (Results 1 – 25 of 528) sorted by relevance

12345678910>>...22

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.txt1 * Rockchip General Register Files (GRF)
6 From RK3368 SoCs, the GRF is divided into two sections,
7 - GRF, used for general non-secure system,
11 On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
13 ON RK3308 SoC, the GRF is divided into four sections:
14 - GRF, used for general non-secure system,
21 - compatible: GRF should be one of the following:
22 - "rockchip,px30-grf", "syscon": for px30
23 - "rockchip,rk3036-grf", "syscon": for rk3036
24 - "rockchip,rk3066-grf", "syscon": for rk3066
[all …]
/OK3568_Linux_fs/kernel/drivers/soc/rockchip/
H A Dgrf.c19 int (*reset)(struct rockchip_grf *grf);
30 struct rockchip_grf *grf; in rockchip_edp_phy_grf_probe() local
33 grf = devm_kzalloc(dev, sizeof(*grf), GFP_KERNEL); in rockchip_edp_phy_grf_probe()
34 if (!grf) in rockchip_edp_phy_grf_probe()
37 grf->funcs = of_device_get_match_data(dev); in rockchip_edp_phy_grf_probe()
38 if (!grf->funcs) in rockchip_edp_phy_grf_probe()
41 grf->regmap = syscon_node_to_regmap(dev->of_node); in rockchip_edp_phy_grf_probe()
42 if (IS_ERR(grf->regmap)) { in rockchip_edp_phy_grf_probe()
43 ret = PTR_ERR(grf->regmap); in rockchip_edp_phy_grf_probe()
44 dev_err(dev, "failed to get grf: %d\n", ret); in rockchip_edp_phy_grf_probe()
[all …]
/OK3568_Linux_fs/u-boot/drivers/net/
H A Dgmac_rockchip.c175 struct px30_grf *grf; in px30_gmac_fix_mac_speed() local
208 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in px30_gmac_fix_mac_speed()
209 rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed); in px30_gmac_fix_mac_speed()
254 struct rk322x_grf *grf; in rk3228_gmac_fix_mac_speed() local
291 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3228_gmac_fix_mac_speed()
292 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_fix_mac_speed()
305 struct rk3288_grf *grf; in rk3288_gmac_fix_mac_speed() local
323 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3288_gmac_fix_mac_speed()
324 rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk); in rk3288_gmac_fix_mac_speed()
333 struct rk3308_grf *grf; in rk3308_gmac_fix_mac_speed() local
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-rk.c77 struct regmap *grf; member
247 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M); in rk_gmac_integrated_ephy_powerup()
248 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE); in rk_gmac_integrated_ephy_powerup()
250 regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID); in rk_gmac_integrated_ephy_powerup()
251 regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID); in rk_gmac_integrated_ephy_powerup()
255 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); in rk_gmac_integrated_ephy_powerup()
262 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE); in rk_gmac_integrated_ephy_powerup()
269 regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE); in rk_gmac_integrated_ephy_powerdown()
292 if (IS_ERR(priv->grf) || !priv->phy_reset) { in rk_gmac_integrated_fephy_power()
293 dev_err(dev, "%s: Missing rockchip,grf or phy_reset property\n", in rk_gmac_integrated_fephy_power()
[all …]
/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-naneng-edp.c70 struct regmap *grf; member
74 static inline int rockchip_grf_write(struct regmap *grf, uint reg, uint mask, in rockchip_grf_write() argument
77 return regmap_write(grf, reg, (mask << 16) | (val & mask)); in rockchip_grf_write()
103 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
106 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON4, in rockchip_edp_phy_set_voltage()
109 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON5, in rockchip_edp_phy_set_voltage()
114 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
117 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON4, in rockchip_edp_phy_set_voltage()
120 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON5, in rockchip_edp_phy_set_voltage()
125 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-naneng-edp.c75 struct regmap *grf; member
80 static inline int rockchip_grf_write(struct regmap *grf, unsigned int reg, in rockchip_grf_write() argument
83 return regmap_write(grf, reg, (mask << 16) | (val & mask)); in rockchip_grf_write()
109 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
112 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON4, in rockchip_edp_phy_set_voltage()
115 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON5, in rockchip_edp_phy_set_voltage()
120 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
123 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON4, in rockchip_edp_phy_set_voltage()
126 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON5, in rockchip_edp_phy_set_voltage()
131 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
[all …]
H A Dphy-rockchip-naneng-usb2.c86 * 0: iddig; 1: grf.
103 * @iddig_output: utmi iddig value from grf output.
104 * @iddig_en: select utmi iddig output from grf or phy,
105 * 0: from phy output; 1: from grf output
151 * @reg: the address offset of grf for usb-phy config.
220 * @grf: General Register Files regmap.
238 struct regmap *grf; member
289 if (!property_enabled(rphy->grf, &rphy->phy_cfg->clkout_ctl)) { in rockchip_usb2phy_clk480m_prepare()
290 ret = property_enable(rphy->grf, &rphy->phy_cfg->clkout_ctl, in rockchip_usb2phy_clk480m_prepare()
308 property_enable(rphy->grf, &rphy->phy_cfg->clkout_ctl, false); in rockchip_usb2phy_clk480m_unprepare()
[all …]
H A Dphy-rockchip-inno-usb2.c128 * @pipe_phystatus: select pipe phystatus from grf or phy.
137 * @bypass_iomux: usb bypass uart GRF iomux register.
150 * @iddig_output: iddig output from grf.
151 * @iddig_en: utmi iddig select between grf and phy,
152 * 0: from phy; 1: from grf
210 * @reg: the address offset of grf for usb-phy config.
243 * @sel_pipe_phystatus: select pipe phystatus from grf.
309 * @grf: General Register Files regmap.
334 struct regmap *grf; member
357 return rphy->usbgrf == NULL ? rphy->grf : rphy->usbgrf; in get_reg_base()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rv1126/
H A Drv1126.c378 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
381 rk_clrsetreg(&grf->gpio1c_iomux_l, in board_debug_uart_init()
388 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
406 rk_clrsetreg(&grf->gpio1d_iomux_l, in board_debug_uart_init()
413 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
417 rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK, in board_debug_uart_init()
421 rk_clrsetreg(&grf->gpio1a_iomux_h, in board_debug_uart_init()
427 rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK, in board_debug_uart_init()
431 rk_clrsetreg(&grf->gpio3a_iomux_l, in board_debug_uart_init()
438 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/rk628/
H A Drk628_rgb.c41 struct regmap *grf; member
122 regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON0, in rk628_bt1120_rx_enable()
125 regmap_write(rgb->grf, in rk628_bt1120_rx_enable()
127 regmap_write(rgb->grf, GRF_BT1120_DCLK_DELAY_CON1, 0); in rk628_bt1120_rx_enable()
129 regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON0, in rk628_bt1120_rx_enable()
132 regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON1, in rk628_bt1120_rx_enable()
134 regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON2, in rk628_bt1120_rx_enable()
137 regmap_update_bits(rgb->grf, GRF_SYSTEM_CON0, in rk628_bt1120_rx_enable()
141 regmap_write(rgb->grf, GRF_CSC_CTRL_CON, SW_Y2R_EN(1)); in rk628_bt1120_rx_enable()
143 regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON0, in rk628_bt1120_rx_enable()
[all …]
H A Drk628_post_process.c31 struct regmap *grf; member
184 regmap_update_bits(pp->grf, GRF_RGB_DEC_CON0, in rk628_post_process_scaler_init()
186 regmap_write(pp->grf, GRF_SCALER_CON0, in rk628_post_process_scaler_init()
190 regmap_write(pp->grf, GRF_SCALER_CON1, in rk628_post_process_scaler_init()
192 regmap_write(pp->grf, GRF_SCALER_CON2, in rk628_post_process_scaler_init()
195 regmap_write(pp->grf, GRF_SCALER_CON3, in rk628_post_process_scaler_init()
197 regmap_write(pp->grf, GRF_SCALER_CON4, in rk628_post_process_scaler_init()
199 regmap_write(pp->grf, GRF_SCALER_CON5, in rk628_post_process_scaler_init()
201 regmap_write(pp->grf, GRF_SCALER_CON6, in rk628_post_process_scaler_init()
203 regmap_write(pp->grf, GRF_SCALER_CON7, in rk628_post_process_scaler_init()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3568/
H A Drk3568.c530 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
535 rk_clrsetreg(&grf->iofunc_sel3, UART1_IO_SEL_MASK, in board_debug_uart_init()
539 rk_clrsetreg(&grf->gpio2b_iomux_l, in board_debug_uart_init()
541 rk_clrsetreg(&grf->gpio2b_iomux_h, in board_debug_uart_init()
545 rk_clrsetreg(&grf->iofunc_sel3, UART1_IO_SEL_MASK, in board_debug_uart_init()
549 rk_clrsetreg(&grf->gpio3d_iomux_h, in board_debug_uart_init()
555 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
561 rk_clrsetreg(&grf->iofunc_sel3, UART2_IO_SEL_MASK, in board_debug_uart_init()
571 rk_clrsetreg(&grf->iofunc_sel3, UART2_IO_SEL_MASK, in board_debug_uart_init()
575 rk_clrsetreg(&grf->gpio1d_iomux_h, in board_debug_uart_init()
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/rockchip/
H A Drk3399_mipi.c33 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dsi_source_select() local
39 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
43 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
58 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dphy_mode_set() local
63 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
67 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); in rk_mipi_dphy_mode_set()
71 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); in rk_mipi_dphy_mode_set()
130 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk_mipi_ofdata_to_platdata()
131 if (priv->grf <= 0) { in rk_mipi_ofdata_to_platdata()
132 debug("%s: Get syscon grf failed (ret=%p)\n", in rk_mipi_ofdata_to_platdata()
[all …]
H A Drk3288_mipi.c35 struct rk3288_grf *grf = priv->grf; in rk_mipi_dsi_source_select() local
41 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
46 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
62 struct rk3288_grf *grf = priv->grf; in rk_mipi_dphy_mode_set() local
67 rk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
72 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
78 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
138 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk_mipi_ofdata_to_platdata()
139 if (IS_ERR(priv->grf)) { in rk_mipi_ofdata_to_platdata()
140 debug("%s: Get syscon grf failed (ret=%p)\n", in rk_mipi_ofdata_to_platdata()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpio/
H A Drockchip,rk3328-grf-gpio.txt1 Rockchip RK3328 GRF (General Register Files) GPIO controller.
5 GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI pins can
12 - compatible: Should contain "rockchip,rk3328-grf-gpio".
21 grf: syscon@ff100000 {
22 compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
24 grf_gpio: grf-gpio {
25 compatible = "rockchip,rk3328-grf-gpio";
31 Note: The grf_gpio node should be declared as the child of the GRF (General
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3588/
H A Dsyscon_rk3588.c13 { .compatible = "rockchip,rk3588-sys-grf", .data = ROCKCHIP_SYSCON_GRF },
14 { .compatible = "rockchip,rk3588-vop-grf", .data = ROCKCHIP_SYSCON_VOP_GRF },
15 { .compatible = "rockchip,rk3588-vo-grf", .data = ROCKCHIP_SYSCON_VO_GRF },
16 { .compatible = "rockchip,pcie30-phy-grf", .data = ROCKCHIP_SYSCON_PCIE30_PHY_GRF },
17 { .compatible = "rockchip,rk3588-php-grf", .data = ROCKCHIP_SYSCON_PHP_GRF },
18 { .compatible = "rockchip,pipe-phy-grf", .data = ROCKCHIP_SYSCON_PIPE_PHY0_GRF },
19 { .compatible = "rockchip,pipe-phy-grf", .data = ROCKCHIP_SYSCON_PIPE_PHY1_GRF },
20 { .compatible = "rockchip,pipe-phy-grf", .data = ROCKCHIP_SYSCON_PIPE_PHY2_GRF },
/OK3568_Linux_fs/kernel/drivers/mfd/
H A Drk630.c23 ret = regmap_write(rk630->grf, GRF_REG(0x8), val); in rk630_macphy_enable()
25 dev_err(rk630->dev, "Could not write to GRF: %d\n", ret); in rk630_macphy_enable()
31 ret = regmap_write(rk630->grf, GRF_REG(0x10), val); in rk630_macphy_enable()
33 dev_err(rk630->dev, "Could not write to GRF: %d\n", ret); in rk630_macphy_enable()
56 ret = regmap_write(rk630->grf, GRF_REG(0x408), val); in rk630_macphy_enable()
58 dev_err(rk630->dev, "Could not write to GRF: %d\n", ret); in rk630_macphy_enable()
65 ret = regmap_write(rk630->grf, GRF_REG(0x400), val); in rk630_macphy_enable()
67 dev_err(rk630->dev, "Could not write to GRF: %d\n", ret); in rk630_macphy_enable()
73 ret = regmap_write(rk630->grf, GRF_REG(0x404), val | 0xffff0000); in rk630_macphy_enable()
75 dev_err(rk630->dev, "Could not write to GRF: %d\n", ret); in rk630_macphy_enable()
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drockchip_lvds.c101 struct regmap *grf; member
201 lvds->grf = syscon_get_regmap(dev_get_parent(dev)); in rockchip_lvds_probe()
216 regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1, in px30_lvds_enable()
224 regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1, in px30_lvds_disable()
235 regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0, in rk3126_lvds_enable()
242 regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0, in rk3126_lvds_disable()
256 regmap_write(lvds->grf, RK3288_GRF_SOC_CON6, in rk3288_lvds_enable()
279 regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, val); in rk3288_lvds_enable()
286 regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, RK3288_LVDS_PWRDWN(1)); in rk3288_lvds_disable()
296 regmap_write(lvds->grf, RK3368_GRF_SOC_CON7, in rk3368_lvds_enable()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk322x/
H A Drk322x.c23 static struct rk322x_grf * const grf = (void *)GRF_BASE; in arch_cpu_init() local
32 rk_setreg(&grf->soc_con[2], 1 << 0); in arch_cpu_init()
35 rk_setreg(&grf->con_iomux, 0xf << 0); in arch_cpu_init()
38 rk_setreg(&grf->con_iomux, (1 << 11) | (1 << 8)); in arch_cpu_init()
47 rk_clrsetreg(&grf->macphy_con[0], MACPHY_CFG_ENABLE_MASK, in arch_cpu_init()
57 static struct rk322x_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
78 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
83 rk_clrsetreg(&grf->con_iomux, in board_debug_uart_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3399/
H A Drk3399.c83 struct rk3399_grf_regs * const grf = (void *)GRF_BASE; in arch_cpu_init() local
104 rk_clrreg(&grf->emmccore_con[11], 0x0ff); in arch_cpu_init()
127 struct rk3399_grf_regs * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
131 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
134 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
139 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
142 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
147 rk_clrsetreg(&grf->soc_con7, in board_debug_uart_init()
152 rk_clrsetreg(&grf->soc_con7, in board_debug_uart_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3368/
H A Drk3368.c95 struct rk3368_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in mcu_init() local
98 rk_clrsetreg(&grf->soc_con14, MCU_SRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
100 rk_clrsetreg(&grf->soc_con11, MCU_SRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
102 rk_clrsetreg(&grf->soc_con14, MCU_EXSRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
104 rk_clrsetreg(&grf->soc_con12, MCU_EXSRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
106 rk_clrsetreg(&grf->soc_con14, MCU_EXPERI_BASE_BIT31_BIT28_MASK, in mcu_init()
108 rk_clrsetreg(&grf->soc_con13, MCU_EXPERI_BASE_BIT27_BIT12_MASK, in mcu_init()
132 * the GRF address range using the syscon API. in board_debug_uart_init()
134 struct rk3368_grf * const grf __maybe_unused = in board_debug_uart_init()
161 rk_clrsetreg(&grf->gpio2d_iomux, in board_debug_uart_init()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3xxx.dtsi178 rockchip,grf = <&grf>;
227 grf: grf@20008000 { label
237 rockchip,grf = <&grf>;
254 rockchip,grf = <&grf>;
269 rockchip,grf = <&grf>;
324 rockchip,grf = <&grf>;
339 rockchip,grf = <&grf>;
354 rockchip,grf = <&grf>;
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-pvtm.c44 struct regmap *grf; member
82 ret = regmap_write(pvtm->grf, pvtm->info->sel_con, in rockchip_clock_sel_internal_pvtm()
103 regmap_write(pvtm->grf, info->con + 0x4, clk_cnt); in rockchip_clock_pvtm_get_value()
104 regmap_write(pvtm->grf, info->con, wr_msk_bit(3, 0, 0x3)); in rockchip_clock_pvtm_get_value()
110 regmap_read(pvtm->grf, info->sta, &sta); in rockchip_clock_pvtm_get_value()
118 regmap_read(pvtm->grf, info->sta + 0x4, &val); in rockchip_clock_pvtm_get_value()
124 regmap_write(pvtm->grf, info->con, wr_msk_bit(0, 0, 0x3)); in rockchip_clock_pvtm_get_value()
147 ret = regmap_write(pvtm->grf, pvtm->info->con, in rockchip_clock_pvtm_init_freq()
154 ret = regmap_write(pvtm->grf, pvtm->info->con, in rockchip_clock_pvtm_init_freq()
245 pvtm->grf = syscon_node_to_regmap(dev->parent->of_node); in rockchip_clock_pvtm_probe()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Danalogix_dp-rockchip.c54 * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
55 * @lcdc_sel: grf register field of lcdc_sel
56 * @spdif_sel: grf register field of spdif_sel
57 * @i2s_sel: grf register field of i2s_sel
58 * @edp_mode: grf register field of edp_mode
81 struct regmap *grf; member
97 static int rockchip_grf_write(struct regmap *grf, unsigned int reg, in rockchip_grf_write() argument
100 return regmap_write(grf, reg, (mask << 16) | (val & mask)); in rockchip_grf_write()
103 static int rockchip_grf_field_write(struct regmap *grf, in rockchip_grf_field_write() argument
115 return rockchip_grf_write(grf, field->reg, mask, val); in rockchip_grf_field_write()
[all …]
/OK3568_Linux_fs/kernel/drivers/thermal/
H A Drockchip_thermal.c126 void (*initialize)(struct regmap *grf,
138 void (*set_tshut_mode)(struct regmap *grf, int chn,
172 * @grf: the general register file will be used to do static set by software
191 struct regmap *grf; member
909 * @grf: the general register file will be used to do static set by software
925 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs, in rk_tsadcv2_initialize() argument
946 * @grf: the general register file will be used to do static set by software
964 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs, in rk_tsadcv3_initialize() argument
968 if (IS_ERR(grf)) { in rk_tsadcv3_initialize()
984 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L); in rk_tsadcv3_initialize()
[all …]

12345678910>>...22