175 	struct px30_grf *grf;  in px30_gmac_fix_mac_speed()  local
208 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in px30_gmac_fix_mac_speed()
209 	rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed);  in px30_gmac_fix_mac_speed()
254 	struct rk322x_grf *grf;  in rk3228_gmac_fix_mac_speed()  local
291 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3228_gmac_fix_mac_speed()
292 	rk_clrsetreg(&grf->mac_con[1],  in rk3228_gmac_fix_mac_speed()
305 	struct rk3288_grf *grf;  in rk3288_gmac_fix_mac_speed()  local
323 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3288_gmac_fix_mac_speed()
324 	rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk);  in rk3288_gmac_fix_mac_speed()
333 	struct rk3308_grf *grf;  in rk3308_gmac_fix_mac_speed()  local
366 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3308_gmac_fix_mac_speed()
367 	rk_clrsetreg(&grf->mac_con0, RK3308_GMAC_SPEED_MASK, speed);  in rk3308_gmac_fix_mac_speed()
376 	struct rk3328_grf_regs *grf;  in rk3328_gmac_fix_mac_speed()  local
413 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3328_gmac_fix_mac_speed()
414 	rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1],  in rk3328_gmac_fix_mac_speed()
427 	struct rk3368_grf *grf;  in rk3368_gmac_fix_mac_speed()  local
451 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3368_gmac_fix_mac_speed()
452 	rk_clrsetreg(&grf->soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk);  in rk3368_gmac_fix_mac_speed()
461 	struct rk3399_grf_regs *grf;  in rk3399_gmac_fix_mac_speed()  local
479 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3399_gmac_fix_mac_speed()
480 	rk_clrsetreg(&grf->soc_con5, RK3399_GMAC_CLK_SEL_MASK, clk);  in rk3399_gmac_fix_mac_speed()
489 	struct rv1108_grf *grf;  in rv1108_set_rmii_speed()  local
514 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rv1108_set_rmii_speed()
515 	rk_clrsetreg(&grf->gmac_con0,  in rv1108_set_rmii_speed()
526 	struct rk3528_grf *grf;  in rk3528_set_rgmii_speed()  local
546 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3528_set_rgmii_speed()
575 		rk_clrsetreg(&grf->gmac1_con0, RK3528_GMAC1_CLK_RGMII_DIV_MASK, div);  in rk3528_set_rgmii_speed()
577 		rk_clrsetreg(&grf->gmac0_con, RK3528_GMAC0_CLK_RMII_DIV_MASK, div);  in rk3528_set_rgmii_speed()
586 	struct rk3562_grf *grf;  in rk3562_set_gmac_speed()  local
613 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3562_set_gmac_speed()
620 				rk_clrsetreg(&grf->soc_con[0],  in rk3562_set_gmac_speed()
634 				rk_clrsetreg(&grf->soc_con[0],  in rk3562_set_gmac_speed()
656 		rk_clrsetreg(&grf->soc_con[1], RK3562_GMAC1_CLK_RMII_DIV_MASK, div);  in rk3562_set_gmac_speed()
658 		rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_CLK_RGMII_DIV_MASK, div);  in rk3562_set_gmac_speed()
725 	struct rv1106_grf *grf;  in rv1106_set_rmii_speed()  local
735 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rv1106_set_rmii_speed()
749 	rk_clrsetreg(&grf->gmac_clk_con, RV1106_GMAC_CLK_RMII_DIV_MASK, div);  in rv1106_set_rmii_speed()
797 	struct px30_grf *grf;  in px30_gmac_set_to_rmii()  local
804 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in px30_gmac_set_to_rmii()
806 	rk_clrsetreg(&grf->mac_con1,  in px30_gmac_set_to_rmii()
813 	struct rk1808_grf *grf;  in rk1808_gmac_set_to_rgmii()  local
835 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk1808_gmac_set_to_rgmii()
836 	rk_clrsetreg(&grf->mac_con1,  in rk1808_gmac_set_to_rgmii()
844 	rk_clrsetreg(&grf->mac_con0,  in rk1808_gmac_set_to_rgmii()
853 	struct rk322x_grf *grf;  in rk3228_gmac_set_to_rgmii()  local
878 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3228_gmac_set_to_rgmii()
879 	rk_clrsetreg(&grf->mac_con[1],  in rk3228_gmac_set_to_rgmii()
888 	rk_clrsetreg(&grf->mac_con[0],  in rk3228_gmac_set_to_rgmii()
897 	struct rk322x_grf *grf;  in rk3228_gmac_set_to_rmii()  local
907 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3228_gmac_set_to_rmii()
908 	rk_clrsetreg(&grf->mac_con[1],  in rk3228_gmac_set_to_rmii()
919 	struct rk3288_grf *grf;  in rk3288_gmac_set_to_rgmii()  local
921 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3288_gmac_set_to_rgmii()
922 	rk_clrsetreg(&grf->soc_con1,  in rk3288_gmac_set_to_rgmii()
926 	rk_clrsetreg(&grf->soc_con3,  in rk3288_gmac_set_to_rgmii()
939 	struct rk3308_grf *grf;  in rk3308_gmac_set_to_rmii()  local
946 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3308_gmac_set_to_rmii()
948 	rk_clrsetreg(&grf->mac_con0,  in rk3308_gmac_set_to_rmii()
955 	struct rk3328_grf_regs *grf;  in rk3328_gmac_set_to_rgmii()  local
980 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3328_gmac_set_to_rgmii()
981 	rk_clrsetreg(&grf->mac_con[1],  in rk3328_gmac_set_to_rgmii()
990 	rk_clrsetreg(&grf->mac_con[0],  in rk3328_gmac_set_to_rgmii()
999 	struct rk3328_grf_regs *grf;  in rk3328_gmac_set_to_rmii()  local
1008 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3328_gmac_set_to_rmii()
1009 	rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1],  in rk3328_gmac_set_to_rmii()
1018 	struct rk3368_grf *grf;  in rk3368_gmac_set_to_rgmii()  local
1038 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3368_gmac_set_to_rgmii()
1039 	rk_clrsetreg(&grf->soc_con15,  in rk3368_gmac_set_to_rgmii()
1043 	rk_clrsetreg(&grf->soc_con16,  in rk3368_gmac_set_to_rgmii()
1056 	struct rk3399_grf_regs *grf;  in rk3399_gmac_set_to_rgmii()  local
1058 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3399_gmac_set_to_rgmii()
1060 	rk_clrsetreg(&grf->soc_con5,  in rk3399_gmac_set_to_rgmii()
1064 	rk_clrsetreg(&grf->soc_con6,  in rk3399_gmac_set_to_rgmii()
1077 	struct rv1108_grf *grf;  in rv1108_gmac_set_to_rmii()  local
1084 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rv1108_gmac_set_to_rmii()
1085 	rk_clrsetreg(&grf->gmac_con0,  in rv1108_gmac_set_to_rmii()
1092 	struct rk322x_grf *grf;  in rk3228_gmac_integrated_phy_powerup()  local
1117 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3228_gmac_integrated_phy_powerup()
1118 	rk_clrsetreg(&grf->con_iomux,  in rk3228_gmac_integrated_phy_powerup()
1122 	rk_clrsetreg(&grf->macphy_con[2],  in rk3228_gmac_integrated_phy_powerup()
1126 	rk_clrsetreg(&grf->macphy_con[3],  in rk3228_gmac_integrated_phy_powerup()
1131 	rk_clrsetreg(&grf->macphy_con[0],  in rk3228_gmac_integrated_phy_powerup()
1144 	rk_clrsetreg(&grf->macphy_con[0],  in rk3228_gmac_integrated_phy_powerup()
1152 	struct rk3328_grf_regs *grf;  in rk3328_gmac_integrated_phy_powerup()  local
1177 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3328_gmac_integrated_phy_powerup()
1178 	rk_clrsetreg(&grf->macphy_con[1],  in rk3328_gmac_integrated_phy_powerup()
1182 	rk_clrsetreg(&grf->macphy_con[2],  in rk3328_gmac_integrated_phy_powerup()
1186 	rk_clrsetreg(&grf->macphy_con[3],  in rk3328_gmac_integrated_phy_powerup()
1191 	rk_clrsetreg(&grf->macphy_con[0],  in rk3328_gmac_integrated_phy_powerup()
1204 	rk_clrsetreg(&grf->macphy_con[0],  in rk3328_gmac_integrated_phy_powerup()
1213 	struct rk3528_grf *grf;  in rk3528_gmac_integrated_phy_powerup()  local
1263 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3528_gmac_integrated_phy_powerup()
1267 	rk_clrsetreg(&grf->macphy_con0,  in rk3528_gmac_integrated_phy_powerup()
1277 	rk_clrsetreg(&grf->macphy_con1,  in rk3528_gmac_integrated_phy_powerup()
1288 	struct rk3528_grf *grf;  in rk3528_set_to_rmii()  local
1302 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3528_set_to_rmii()
1306 		rk_clrsetreg(&grf->gmac1_con1, RK3528_GMAC1_CLK_RMII_MODE_MASK, clk_mode);  in rk3528_set_to_rmii()
1309 		rk_clrsetreg(&grf->gmac0_con, RK3528_GMAC0_CLK_RMII_MODE_MASK, clk_mode);  in rk3528_set_to_rmii()
1317 	struct rk3528_grf *grf;  in rk3528_set_to_rgmii()  local
1344 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3528_set_to_rgmii()
1354 	rk_clrsetreg(&grf->gmac1_con0,  in rk3528_set_to_rgmii()
1361 	rk_clrsetreg(&grf->gmac1_con1,  in rk3528_set_to_rgmii()
1370 	struct rk3562_grf *grf;  in rk3562_set_to_rmii()  local
1379 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3562_set_to_rmii()
1383 		rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_RMII_MODE_MASK, mode);  in rk3562_set_to_rmii()
1389 	struct rk3562_grf *grf;  in rk3562_set_to_rgmii()  local
1419 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3562_set_to_rgmii()
1422 	rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_RGMII_MODE_MASK,  in rk3562_set_to_rgmii()
1458 	struct rk3568_grf *grf;  in rk3568_set_to_rmii()  local
1467 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3568_set_to_rmii()
1470 		con1 = &grf->mac1_con1;  in rk3568_set_to_rmii()
1472 		con1 = &grf->mac0_con1;  in rk3568_set_to_rmii()
1481 	struct rk3568_grf *grf;  in rk3568_set_to_rgmii()  local
1506 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3568_set_to_rgmii()
1509 		con0 = &grf->mac1_con0;  in rk3568_set_to_rgmii()
1510 		con1 = &grf->mac1_con1;  in rk3568_set_to_rgmii()
1512 		con0 = &grf->mac0_con0;  in rk3568_set_to_rgmii()
1513 		con1 = &grf->mac0_con1;  in rk3568_set_to_rgmii()
1574 	struct rk3588_sys_grf *grf;  in rk3588_set_to_rgmii()  local
1605 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3588_set_to_rgmii()
1617 		offset_con = &grf->soc_con9;  in rk3588_set_to_rgmii()
1627 		offset_con = &grf->soc_con8;  in rk3588_set_to_rgmii()
1643 	rk_clrsetreg(&grf->soc_con7, tx_enable_mask | rx_enable_mask,  in rk3588_set_to_rgmii()
1652 	struct rv1106_grf *grf;  in rv1106_gmac_integrated_phy_powerup()  local
1708 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rv1106_gmac_integrated_phy_powerup()
1712 	rk_clrsetreg(&grf->macphy_con0,  in rv1106_gmac_integrated_phy_powerup()
1722 	rk_clrsetreg(&grf->macphy_con1,  in rv1106_gmac_integrated_phy_powerup()
1732 	struct rv1106_grf *grf;  in rv1106_set_to_rmii()  local
1738 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rv1106_set_to_rmii()
1739 	rk_clrsetreg(&grf->gmac_clk_con,  in rv1106_set_to_rmii()
1746 	struct rv1126_grf *grf;  in rv1126_set_to_rmii()  local
1754 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rv1126_set_to_rmii()
1756 	rk_clrsetreg(&grf->mac_con0,  in rv1126_set_to_rmii()
1763 	struct rv1126_grf *grf;  in rv1126_set_to_rgmii()  local
1801 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rv1126_set_to_rgmii()
1803 	rk_clrsetreg(&grf->mac_con0,  in rv1126_set_to_rgmii()
1815 	rk_clrsetreg(&grf->mac_con1,  in rv1126_set_to_rgmii()
1821 	rk_clrsetreg(&grf->mac_con2,  in rv1126_set_to_rgmii()
1832 	struct rk3528_grf *grf;  in rk3528_set_clock_selection()  local
1844 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3528_set_clock_selection()
1848 	rk_clrsetreg(&grf->gmac1_con0, RK3528_GMAC1_CLK_SELET_MASK, val);  in rk3528_set_clock_selection()
1853 	struct rk3562_grf *grf;  in rk3562_set_clock_selection()  local
1885 	grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);  in rk3562_set_clock_selection()
1891 		rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_CLK_SELET_MASK, val);  in rk3562_set_clock_selection()
1902 		rk_clrsetreg(&grf->soc_con[1], RK3562_GMAC1_CLK_SELET_MASK, val);  in rk3562_set_clock_selection()