1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co. Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Wyon Bi <bivvy.bi@rock-chips.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/clk.h>
10*4882a593Smuzhiyun #include <linux/platform_device.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/regmap.h>
13*4882a593Smuzhiyun #include <linux/mfd/rk628.h>
14*4882a593Smuzhiyun #include <linux/phy/phy.h>
15*4882a593Smuzhiyun #include <linux/reset.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <drm/drm_of.h>
18*4882a593Smuzhiyun #include <drm/drm_atomic.h>
19*4882a593Smuzhiyun #include <drm/drm_probe_helper.h>
20*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
21*4882a593Smuzhiyun #include <drm/drm_panel.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <video/of_display_timing.h>
24*4882a593Smuzhiyun #include <video/videomode.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun enum interface_type {
27*4882a593Smuzhiyun RGB_TX,
28*4882a593Smuzhiyun YUV_RX,
29*4882a593Smuzhiyun YUV_TX,
30*4882a593Smuzhiyun BT1120_RX,
31*4882a593Smuzhiyun BT1120_TX,
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct rk628_rgb {
35*4882a593Smuzhiyun struct drm_bridge base;
36*4882a593Smuzhiyun struct drm_connector connector;
37*4882a593Smuzhiyun struct drm_display_mode mode;
38*4882a593Smuzhiyun struct drm_panel *panel;
39*4882a593Smuzhiyun struct drm_bridge *bridge;
40*4882a593Smuzhiyun struct device *dev;
41*4882a593Smuzhiyun struct regmap *grf;
42*4882a593Smuzhiyun struct rk628 *parent;
43*4882a593Smuzhiyun struct clk *decclk;
44*4882a593Smuzhiyun struct reset_control *rstc;
45*4882a593Smuzhiyun bool dual_edge;
46*4882a593Smuzhiyun enum interface_type interface_type;
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
bridge_to_rgb(struct drm_bridge * b)49*4882a593Smuzhiyun static inline struct rk628_rgb *bridge_to_rgb(struct drm_bridge *b)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun return container_of(b, struct rk628_rgb, base);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
connector_to_rgb(struct drm_connector * c)54*4882a593Smuzhiyun static inline struct rk628_rgb *connector_to_rgb(struct drm_connector *c)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun return container_of(c, struct rk628_rgb, connector);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
rk628_rgb_get_interface_type(struct rk628_rgb * rgb)59*4882a593Smuzhiyun static enum interface_type rk628_rgb_get_interface_type(struct rk628_rgb *rgb)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun const struct device_node *of_node = rgb->dev->of_node;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun if (of_device_is_compatible(of_node, "rockchip,rk628-yuv-rx"))
64*4882a593Smuzhiyun return YUV_RX;
65*4882a593Smuzhiyun else if (of_device_is_compatible(of_node, "rockchip,rk628-yuv-tx"))
66*4882a593Smuzhiyun return YUV_TX;
67*4882a593Smuzhiyun else if (of_device_is_compatible(of_node, "rockchip,rk628-bt1120-rx"))
68*4882a593Smuzhiyun return BT1120_RX;
69*4882a593Smuzhiyun else if (of_device_is_compatible(of_node, "rockchip,rk628-bt1120-tx"))
70*4882a593Smuzhiyun return BT1120_TX;
71*4882a593Smuzhiyun else
72*4882a593Smuzhiyun return RGB_TX;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static struct drm_encoder *
rk628_rgb_connector_best_encoder(struct drm_connector * connector)76*4882a593Smuzhiyun rk628_rgb_connector_best_encoder(struct drm_connector *connector)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct rk628_rgb *rgb = connector_to_rgb(connector);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun return rgb->base.encoder;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
rk628_rgb_connector_get_modes(struct drm_connector * connector)83*4882a593Smuzhiyun static int rk628_rgb_connector_get_modes(struct drm_connector *connector)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun struct rk628_rgb *rgb = connector_to_rgb(connector);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun return drm_panel_get_modes(rgb->panel, connector);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun static const struct drm_connector_helper_funcs
91*4882a593Smuzhiyun rk628_rgb_connector_helper_funcs = {
92*4882a593Smuzhiyun .get_modes = rk628_rgb_connector_get_modes,
93*4882a593Smuzhiyun .best_encoder = rk628_rgb_connector_best_encoder,
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
rk628_rgb_connector_destroy(struct drm_connector * connector)96*4882a593Smuzhiyun static void rk628_rgb_connector_destroy(struct drm_connector *connector)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun drm_connector_cleanup(connector);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static const struct drm_connector_funcs rk628_rgb_connector_funcs = {
102*4882a593Smuzhiyun .fill_modes = drm_helper_probe_single_connector_modes,
103*4882a593Smuzhiyun .destroy = rk628_rgb_connector_destroy,
104*4882a593Smuzhiyun .reset = drm_atomic_helper_connector_reset,
105*4882a593Smuzhiyun .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
106*4882a593Smuzhiyun .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
rk628_bt1120_rx_enable(struct rk628_rgb * rgb)109*4882a593Smuzhiyun static void rk628_bt1120_rx_enable(struct rk628_rgb *rgb)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun const struct drm_display_mode *mode = &rgb->mode;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun reset_control_assert(rgb->rstc);
114*4882a593Smuzhiyun udelay(10);
115*4882a593Smuzhiyun reset_control_deassert(rgb->rstc);
116*4882a593Smuzhiyun udelay(10);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun clk_set_rate(rgb->decclk, mode->clock * 1000);
119*4882a593Smuzhiyun clk_prepare_enable(rgb->decclk);
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun if (rgb->dual_edge) {
122*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON0,
123*4882a593Smuzhiyun DEC_DUALEDGE_EN, DEC_DUALEDGE_EN);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun regmap_write(rgb->grf,
126*4882a593Smuzhiyun GRF_BT1120_DCLK_DELAY_CON0, 0x10000000);
127*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_BT1120_DCLK_DELAY_CON1, 0);
128*4882a593Smuzhiyun } else
129*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON0,
130*4882a593Smuzhiyun DEC_DUALEDGE_EN, 0);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON1,
133*4882a593Smuzhiyun SW_SET_X_MASK, SW_SET_X(mode->hdisplay));
134*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON2,
135*4882a593Smuzhiyun SW_SET_Y_MASK, SW_SET_Y(mode->vdisplay));
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_SYSTEM_CON0,
138*4882a593Smuzhiyun SW_BT_DATA_OEN_MASK | SW_INPUT_MODE_MASK,
139*4882a593Smuzhiyun SW_BT_DATA_OEN | SW_INPUT_MODE(INPUT_MODE_BT1120));
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_CSC_CTRL_CON, SW_Y2R_EN(1));
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_RGB_DEC_CON0,
144*4882a593Smuzhiyun SW_CAP_EN_PSYNC | SW_CAP_EN_ASYNC | SW_PROGRESS_EN,
145*4882a593Smuzhiyun SW_CAP_EN_PSYNC | SW_CAP_EN_ASYNC | SW_PROGRESS_EN);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
rk628_bt1120_tx_enable(struct rk628_rgb * rgb)148*4882a593Smuzhiyun static void rk628_bt1120_tx_enable(struct rk628_rgb *rgb)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun u32 val = 0;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_SYSTEM_CON0,
153*4882a593Smuzhiyun SW_BT_DATA_OEN_MASK | SW_OUTPUT_MODE_MASK,
154*4882a593Smuzhiyun SW_OUTPUT_MODE(OUTPUT_MODE_BT1120));
155*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_CSC_CTRL_CON, SW_R2Y_EN(1));
156*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_POST_PROC_CON,
157*4882a593Smuzhiyun SW_DCLK_OUT_INV_EN, SW_DCLK_OUT_INV_EN);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (rgb->dual_edge) {
160*4882a593Smuzhiyun val |= ENC_DUALEDGE_EN(1);
161*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_BT1120_DCLK_DELAY_CON0, 0x10000000);
162*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_BT1120_DCLK_DELAY_CON1, 0);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun val |= BT1120_UV_SWAP(1);
166*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_RGB_ENC_CON, val);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
rk628_rgb_bridge_enable(struct drm_bridge * bridge)170*4882a593Smuzhiyun static void rk628_rgb_bridge_enable(struct drm_bridge *bridge)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun struct rk628_rgb *rgb = bridge_to_rgb(bridge);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun switch (rgb->interface_type) {
175*4882a593Smuzhiyun case YUV_RX:
176*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_CSC_CTRL_CON, SW_Y2R_EN(1));
177*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_SYSTEM_CON0,
178*4882a593Smuzhiyun SW_BT_DATA_OEN_MASK | SW_INPUT_MODE_MASK,
179*4882a593Smuzhiyun SW_BT_DATA_OEN | SW_INPUT_MODE(INPUT_MODE_YUV));
180*4882a593Smuzhiyun break;
181*4882a593Smuzhiyun case YUV_TX:
182*4882a593Smuzhiyun regmap_write(rgb->grf, GRF_CSC_CTRL_CON, SW_R2Y_EN(1));
183*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_POST_PROC_CON,
184*4882a593Smuzhiyun SW_DCLK_OUT_INV_EN, SW_DCLK_OUT_INV_EN);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_SYSTEM_CON0,
187*4882a593Smuzhiyun SW_BT_DATA_OEN_MASK | SW_OUTPUT_MODE_MASK,
188*4882a593Smuzhiyun SW_OUTPUT_MODE(OUTPUT_MODE_YUV));
189*4882a593Smuzhiyun break;
190*4882a593Smuzhiyun case BT1120_RX:
191*4882a593Smuzhiyun rk628_bt1120_rx_enable(rgb);
192*4882a593Smuzhiyun break;
193*4882a593Smuzhiyun case BT1120_TX:
194*4882a593Smuzhiyun rk628_bt1120_tx_enable(rgb);
195*4882a593Smuzhiyun break;
196*4882a593Smuzhiyun case RGB_TX:
197*4882a593Smuzhiyun default:
198*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_SYSTEM_CON0,
199*4882a593Smuzhiyun SW_BT_DATA_OEN_MASK | SW_OUTPUT_MODE_MASK,
200*4882a593Smuzhiyun SW_OUTPUT_MODE(OUTPUT_MODE_RGB));
201*4882a593Smuzhiyun regmap_update_bits(rgb->grf, GRF_POST_PROC_CON,
202*4882a593Smuzhiyun SW_DCLK_OUT_INV_EN, SW_DCLK_OUT_INV_EN);
203*4882a593Smuzhiyun break;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun if (rgb->panel) {
207*4882a593Smuzhiyun drm_panel_prepare(rgb->panel);
208*4882a593Smuzhiyun drm_panel_enable(rgb->panel);
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
rk628_rgb_bridge_disable(struct drm_bridge * bridge)212*4882a593Smuzhiyun static void rk628_rgb_bridge_disable(struct drm_bridge *bridge)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun struct rk628_rgb *rgb = bridge_to_rgb(bridge);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun if (rgb->panel) {
217*4882a593Smuzhiyun drm_panel_disable(rgb->panel);
218*4882a593Smuzhiyun drm_panel_unprepare(rgb->panel);
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun if (rgb->decclk)
222*4882a593Smuzhiyun clk_disable_unprepare(rgb->decclk);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun if (rgb->rstc)
225*4882a593Smuzhiyun reset_control_assert(rgb->rstc);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
rk628_rgb_bridge_attach(struct drm_bridge * bridge,enum drm_bridge_attach_flags flags)228*4882a593Smuzhiyun static int rk628_rgb_bridge_attach(struct drm_bridge *bridge,
229*4882a593Smuzhiyun enum drm_bridge_attach_flags flags)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun struct rk628_rgb *rgb = bridge_to_rgb(bridge);
232*4882a593Smuzhiyun struct drm_connector *connector = &rgb->connector;
233*4882a593Smuzhiyun struct drm_device *drm = bridge->dev;
234*4882a593Smuzhiyun struct device *dev = rgb->dev;
235*4882a593Smuzhiyun int ret;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun ret = drm_of_find_panel_or_bridge(dev->of_node, 1, -1,
238*4882a593Smuzhiyun &rgb->panel, &rgb->bridge);
239*4882a593Smuzhiyun if (ret)
240*4882a593Smuzhiyun return ret;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun if (rgb->interface_type == YUV_RX || rgb->interface_type == BT1120_RX) {
243*4882a593Smuzhiyun if (!rgb->bridge) {
244*4882a593Smuzhiyun dev_err(dev, "decoder failed to find bridge\n");
245*4882a593Smuzhiyun return -EPROBE_DEFER;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun ret = drm_bridge_attach(bridge->encoder, rgb->bridge, bridge,
249*4882a593Smuzhiyun flags);
250*4882a593Smuzhiyun if (ret) {
251*4882a593Smuzhiyun dev_err(dev, "failed to attach bridge\n");
252*4882a593Smuzhiyun return ret;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun } else {
255*4882a593Smuzhiyun if (rgb->bridge) {
256*4882a593Smuzhiyun ret = drm_bridge_attach(bridge->encoder, rgb->bridge,
257*4882a593Smuzhiyun bridge, flags);
258*4882a593Smuzhiyun if (ret) {
259*4882a593Smuzhiyun dev_err(dev, "failed to attach bridge\n");
260*4882a593Smuzhiyun return ret;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
265*4882a593Smuzhiyun return 0;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (rgb->panel) {
268*4882a593Smuzhiyun ret = drm_connector_init(drm, connector,
269*4882a593Smuzhiyun &rk628_rgb_connector_funcs,
270*4882a593Smuzhiyun DRM_MODE_CONNECTOR_DPI);
271*4882a593Smuzhiyun if (ret) {
272*4882a593Smuzhiyun dev_err(dev,
273*4882a593Smuzhiyun "Failed to initialize connector with drm\n");
274*4882a593Smuzhiyun return ret;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun drm_connector_helper_add(connector,
278*4882a593Smuzhiyun &rk628_rgb_connector_helper_funcs);
279*4882a593Smuzhiyun drm_connector_attach_encoder(connector,
280*4882a593Smuzhiyun bridge->encoder);
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
rk628_rgb_bridge_mode_set(struct drm_bridge * bridge,const struct drm_display_mode * mode,const struct drm_display_mode * adj)287*4882a593Smuzhiyun static void rk628_rgb_bridge_mode_set(struct drm_bridge *bridge,
288*4882a593Smuzhiyun const struct drm_display_mode *mode,
289*4882a593Smuzhiyun const struct drm_display_mode *adj)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun struct rk628_rgb *rgb = bridge_to_rgb(bridge);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun drm_mode_copy(&rgb->mode, adj);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun static const struct drm_bridge_funcs rk628_rgb_bridge_funcs = {
297*4882a593Smuzhiyun .attach = rk628_rgb_bridge_attach,
298*4882a593Smuzhiyun .enable = rk628_rgb_bridge_enable,
299*4882a593Smuzhiyun .disable = rk628_rgb_bridge_disable,
300*4882a593Smuzhiyun .mode_set = rk628_rgb_bridge_mode_set,
301*4882a593Smuzhiyun };
302*4882a593Smuzhiyun
rk628_rgb_probe(struct platform_device * pdev)303*4882a593Smuzhiyun static int rk628_rgb_probe(struct platform_device *pdev)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun struct rk628 *rk628 = dev_get_drvdata(pdev->dev.parent);
306*4882a593Smuzhiyun struct device *dev = &pdev->dev;
307*4882a593Smuzhiyun struct rk628_rgb *rgb;
308*4882a593Smuzhiyun int ret;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun if (!of_device_is_available(dev->of_node))
311*4882a593Smuzhiyun return -ENODEV;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun rgb = devm_kzalloc(dev, sizeof(*rgb), GFP_KERNEL);
314*4882a593Smuzhiyun if (!rgb)
315*4882a593Smuzhiyun return -ENOMEM;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun rgb->dev = dev;
318*4882a593Smuzhiyun rgb->parent = rk628;
319*4882a593Smuzhiyun rgb->grf = rk628->grf;
320*4882a593Smuzhiyun rgb->interface_type = rk628_rgb_get_interface_type(rgb);
321*4882a593Smuzhiyun rgb->dual_edge = of_property_read_bool(dev->of_node, "dual-edge");
322*4882a593Smuzhiyun platform_set_drvdata(pdev, rgb);
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun if (rgb->interface_type == BT1120_RX) {
325*4882a593Smuzhiyun rgb->decclk = devm_clk_get(dev, "bt1120dec");
326*4882a593Smuzhiyun if (IS_ERR(rgb->decclk)) {
327*4882a593Smuzhiyun ret = PTR_ERR(rgb->decclk);
328*4882a593Smuzhiyun dev_err(dev, "failed to get dec clk: %d\n", ret);
329*4882a593Smuzhiyun return ret;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun rgb->rstc = of_reset_control_get(dev->of_node, NULL);
333*4882a593Smuzhiyun if (IS_ERR(rgb->rstc)) {
334*4882a593Smuzhiyun ret = PTR_ERR(rgb->rstc);
335*4882a593Smuzhiyun dev_err(dev, "failed to get reset control: %d\n", ret);
336*4882a593Smuzhiyun return ret;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun rgb->base.funcs = &rk628_rgb_bridge_funcs;
341*4882a593Smuzhiyun rgb->base.of_node = dev->of_node;
342*4882a593Smuzhiyun drm_bridge_add(&rgb->base);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun return 0;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
rk628_rgb_remove(struct platform_device * pdev)347*4882a593Smuzhiyun static int rk628_rgb_remove(struct platform_device *pdev)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun struct rk628_rgb *rgb = platform_get_drvdata(pdev);
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun drm_bridge_remove(&rgb->base);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun return 0;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun static const struct of_device_id rk628_rgb_of_match[] = {
357*4882a593Smuzhiyun { .compatible = "rockchip,rk628-rgb-tx", },
358*4882a593Smuzhiyun { .compatible = "rockchip,rk628-yuv-rx", },
359*4882a593Smuzhiyun { .compatible = "rockchip,rk628-yuv-tx", },
360*4882a593Smuzhiyun { .compatible = "rockchip,rk628-bt1120-rx", },
361*4882a593Smuzhiyun { .compatible = "rockchip,rk628-bt1120-tx", },
362*4882a593Smuzhiyun {},
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, rk628_rgb_of_match);
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun static struct platform_driver rk628_rgb_driver = {
367*4882a593Smuzhiyun .driver = {
368*4882a593Smuzhiyun .name = "rk628-rgb",
369*4882a593Smuzhiyun .of_match_table = of_match_ptr(rk628_rgb_of_match),
370*4882a593Smuzhiyun },
371*4882a593Smuzhiyun .probe = rk628_rgb_probe,
372*4882a593Smuzhiyun .remove = rk628_rgb_remove,
373*4882a593Smuzhiyun };
374*4882a593Smuzhiyun module_platform_driver(rk628_rgb_driver);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
377*4882a593Smuzhiyun MODULE_DESCRIPTION("Rockchip RK628 RGB driver");
378*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
379