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12

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dram/
H A Drk3399_dram_timing.txt4 - compatible : Should be "rockchip,ddr-timing"
6 - ddr3_speed_bin : Value is defined at include/dt-bindings/clock/ddr.h.
7 It select DDR3 cl-trp-trcd type, default value "DDR3_DEFAULT".it must selected
11 - pd_idle : Defines the power-down mode auto entry controller clocks.
14 power-down low power state.
16 - sr_idle : Defines the Self-Refresh or Self-Refresh with Memory Clock Gating
19 before the controller will automatically issue an entry into the Self-Refresh
20 or Self-Refresh with Memory Clock Gating low power state.
22 - sr_mc_gate_idle : Defined the Self-Refresh with Memory and Controller Clock Gating
25 the controller will automatically issue an entry into the Self-Refresh with
[all …]
/OK3568_Linux_fs/rkbin/tools/
H A Dddrbin_tool_user_guide.txt9 ./ddrbin_tool -g gen_param.txt px30_ddr_333MHz_v1.15.bin
16 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
18 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
20 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
22 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
24 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
26 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
28 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
30 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
32 …+---------------+-----------+----------+-------+--------+-------+-------------------+-------------…
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-j7200-common-proc-board.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200-som-p0.dtsi"
9 #include <dt-bindings/net/ti-dp83867.h>
10 #include <dt-bindings/mux/ti-serdes.h>
14 stdout-path = "serial2:115200n8";
20 mcu_cpsw_pins_default: mcu-cpsw-pins-default {
21 pinctrl-single,pins = <
37 mcu_mdio_pins_default: mcu-mdio1-pins-default {
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H A Dk3-am654-base-board.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-am654.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/net/ti-dp83867.h>
13 compatible = "ti,am654-evm", "ti,am654";
17 stdout-path = "serial2:115200n8";
28 reserved-memory {
29 #address-cells = <2>;
[all …]
H A Dk3-j721e-common-proc-board.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721e-som-p0.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/net/ti-dp83867.h>
15 stdout-path = "serial2:115200n8";
19 gpio_keys: gpio-keys {
20 compatible = "gpio-keys";
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/OK3568_Linux_fs/kernel/drivers/staging/pi433/Documentation/
H A Dpi433.txt8 This driver is for controlling pi433, a radio module for the Raspberry Pi
14 The driver supports on the fly reloading of the hardware fifo of the rf
17 Description of driver operation
23 module. Therefore each application can set its own set of parameters. The driver
46 Now the driver is waiting, that a predefined RSSI level (signal strength at the
56 Driver API
59 The driver is currently implemented as a character device. Therefore it supports
64 ----------------
67 PI433_IOC_RD_TX_CFG - get the transmission parameters from the driver
68 PI433_IOC_WR_TX_CFG - set the transmission parameters
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
28 imx*-pinfunc.h under device tree source folder. The last integer CONFIG is
29 the pad setting value like pull-up on this pin. And that's why fsl,pins entry
41 Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
45 Some requirements for using fsl,imx-pinctrl binding:
52 3. The driver can use the function node's name and pin configuration node's
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/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-inno-usb3.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on phy-rockchip-inno-usb3.c in Linux Kernel.
12 #include <generic-phy.h>
89 * struct rockchip_u3phy_apbcfg: usb3-phy apb configuration.
90 * @u2_pre_emp: usb2-phy pre-emphasis tuning.
91 * @u2_pre_emp_sth: usb2-phy pre-emphasis strength tuning.
92 * @u2_odt_tuning: usb2-phy odt 45ohm tuning.
132 unsigned int tmp = desired ? reg->dvalue : reg->rvalue; in param_write()
135 mask = GENMASK(reg->bitend, reg->bitstart); in param_write()
136 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write()
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/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/pinctrl/
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
26 driver loads. This would allow representing a board's static pin configuration
47 pinctrl-0: List of phandles, each pointing at a pin configuration
65 pinctrl-1: List of phandles, each pointing at a pin configuration
68 pinctrl-n: List of phandles, each pointing at a pin configuration
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/t208xrdb/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
38 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
40 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
41 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
42 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
43 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
45 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/ls1043aqds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0+
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
38 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
40 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
41 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
42 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
43 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
45 popts->cpo_override = pbsp->cpo_override; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/t208xqds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
36 if (popts->registered_dimm_en) in fsl_ddr_board_options()
45 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
46 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
47 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
48 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
49 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
50 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
51 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/t4rdb/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0+
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
36 if (popts->registered_dimm_en) in fsl_ddr_board_options()
46 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
47 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
48 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
49 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
50 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
51 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
52 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/p2041rdb/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
33 * wr_data_delay = 0-6
34 * clk adjust = 0-8
35 * cpo 2-0x1E (30)
61 if (!pdimm->n_ranks) in fsl_ddr_board_options()
71 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
72 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
73 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
74 popts->cpo_override = pbsp->cpo; in fsl_ddr_board_options()
75 popts->write_data_delay = in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/t4qds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
36 if (popts->registered_dimm_en) in fsl_ddr_board_options()
46 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
47 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
48 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
49 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
50 popts->cpo_override = pbsp->cpo; in fsl_ddr_board_options()
51 popts->write_data_delay = in fsl_ddr_board_options()
52 pbsp->write_data_delay; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/t104xrdb/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0+
30 if (!pdimm->n_ranks) in fsl_ddr_board_options()
39 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
40 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
41 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
42 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
43 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
44 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
45 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
46 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/t1040qds/
H A Dddr.c2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
30 if (!pdimm->n_ranks) in fsl_ddr_board_options()
39 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
40 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
41 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
42 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
43 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
44 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
45 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
[all …]
/OK3568_Linux_fs/kernel/drivers/pinctrl/bcm/
H A Dpinctrl-bcm281xx.c2 * Copyright (C) 2013-2017 Broadcom
22 #include <linux/pinctrl/pinconf-generic.h>
26 #include "../pinctrl-utils.h"
63 * bcm281xx_pin_type - types of pin register
77 * bcm281xx_pin_function- define pin function
86 * bcm281xx_pinctrl_data - Broadcom-specific pinctrl data
87 * @reg_base - base of pinctrl registers
928 /* Every pin can implement all ALT1-ALT4 functions */
955 if (pin >= pdata->npins) in pin_type_get()
958 return *(enum bcm281xx_pin_type *)(pdata->pins[pin].drv_data); in pin_type_get()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/ls2080a/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0+
27 if (!pdimm->n_ranks) in fsl_ddr_board_options()
34 if (popts->registered_dimm_en) in fsl_ddr_board_options()
44 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
45 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
46 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
47 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
48 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
49 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
50 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-inno-usb3.c2 * Rockchip USB 3.0 PHY with Innosilicon IP block driver
104 * struct rockchip_u3phy_apbcfg: usb3-phy apb configuration.
105 * @u2_pre_emp: usb2-phy pre-emphasis tuning.
106 * @u2_pre_emp_sth: usb2-phy pre-emphasis strength tuning.
107 * @u2_odt_tuning: usb2-phy odt 45ohm tuning.
157 unsigned int tmp = desired ? reg->dvalue : reg->rvalue; in param_write()
160 mask = GENMASK(reg->bitend, reg->bitstart); in param_write()
161 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write()
162 ret = regmap_write(base, reg->offset, val); in param_write()
173 unsigned int mask = GENMASK(reg->bitend, reg->bitstart); in param_exped()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/ls1021aqds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0+
27 if (!pdimm->n_ranks) in fsl_ddr_board_options()
36 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
37 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
38 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
40 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
41 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
42 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
43 popts->cpo_override = pbsp->cpo_override; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/t102xqds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0+
66 struct cpu_type *cpu = gd->arch.cpu; in fsl_ddr_board_options()
72 if (!pdimm->n_ranks) in fsl_ddr_board_options()
81 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
82 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
83 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
84 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
85 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
86 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
87 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/varisys/cyrus/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0+
107 if (!pdimm->n_ranks) in fsl_ddr_board_options()
110 if (popts->registered_dimm_en) in fsl_ddr_board_options()
120 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
121 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
122 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
123 popts->cpo_override = pbsp->cpo; in fsl_ddr_board_options()
124 popts->write_data_delay = in fsl_ddr_board_options()
125 pbsp->write_data_delay; in fsl_ddr_board_options()
126 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/drivers/ddr/fsl/
H A Dctrl_regs.c2 * Copyright 2008-2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
8 * Generic driver for Freescale DDR/DDR2/DDR3/DDR4 memory controller.
29 * Rtt(nominal) - DDR2:
31 * 1 = 75 ohm
32 * 2 = 150 ohm
33 * 3 = 50 ohm
34 * Rtt(nominal) - DDR3:
36 * 1 = 60 ohm
37 * 2 = 120 ohm
[all …]

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