4  * SPDX-License-Identifier:	GPL-2.0
29 	if (!pdimm->n_ranks)  in fsl_ddr_board_options()
36 	if (popts->registered_dimm_en)  in fsl_ddr_board_options()
46 	while (pbsp->datarate_mhz_high) {  in fsl_ddr_board_options()
47 		if (pbsp->n_ranks == pdimm->n_ranks &&  in fsl_ddr_board_options()
48 		    (pdimm->rank_density >> 30) >= pbsp->rank_gb) {  in fsl_ddr_board_options()
49 			if (ddr_freq <= pbsp->datarate_mhz_high) {  in fsl_ddr_board_options()
50 				popts->cpo_override = pbsp->cpo;  in fsl_ddr_board_options()
51 				popts->write_data_delay =  in fsl_ddr_board_options()
52 					pbsp->write_data_delay;  in fsl_ddr_board_options()
53 				popts->clk_adjust = pbsp->clk_adjust;  in fsl_ddr_board_options()
54 				popts->wrlvl_start = pbsp->wrlvl_start;  in fsl_ddr_board_options()
55 				popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
56 				popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
57 				popts->twot_en = pbsp->force_2t;  in fsl_ddr_board_options()
69 			ddr_freq, pbsp_highest->datarate_mhz_high);  in fsl_ddr_board_options()
70 		popts->cpo_override = pbsp_highest->cpo;  in fsl_ddr_board_options()
71 		popts->write_data_delay = pbsp_highest->write_data_delay;  in fsl_ddr_board_options()
72 		popts->clk_adjust = pbsp_highest->clk_adjust;  in fsl_ddr_board_options()
73 		popts->wrlvl_start = pbsp_highest->wrlvl_start;  in fsl_ddr_board_options()
74 		popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
75 		popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
76 		popts->twot_en = pbsp_highest->force_2t;  in fsl_ddr_board_options()
84 		pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb,  in fsl_ddr_board_options()
85 		pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,  in fsl_ddr_board_options()
86 		pbsp->wrlvl_ctl_3);  in fsl_ddr_board_options()
89 	 * Factors to consider for half-strength driver enable:  in fsl_ddr_board_options()
90 	 *	- number of DIMMs installed  in fsl_ddr_board_options()
92 	popts->half_strength_driver_enable = 0;  in fsl_ddr_board_options()
96 	popts->wrlvl_override = 1;  in fsl_ddr_board_options()
97 	popts->wrlvl_sample = 0xf;  in fsl_ddr_board_options()
102 	popts->rtt_override = 0;  in fsl_ddr_board_options()
105 	popts->zq_en = 1;  in fsl_ddr_board_options()
107 	/* DHC_EN =1, ODT = 75 Ohm */  in fsl_ddr_board_options()
108 	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
109 	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
111 	/* optimize cpo for erratum A-009942 */  in fsl_ddr_board_options()
112 	popts->cpo_sample = 0x63;  in fsl_ddr_board_options()
130 	gd->ram_size = dram_size;  in dram_init()