freescale/t104xrdb/ddr.c

4  * SPDX-License-Identifier:	GPL-2.0+
30 	if (!pdimm->n_ranks)  in fsl_ddr_board_options()
39 	while (pbsp->datarate_mhz_high) {  in fsl_ddr_board_options()
40 		if (pbsp->n_ranks == pdimm->n_ranks &&  in fsl_ddr_board_options()
41 		    (pdimm->rank_density >> 30) >= pbsp->rank_gb) {  in fsl_ddr_board_options()
42 			if (ddr_freq <= pbsp->datarate_mhz_high) {  in fsl_ddr_board_options()
43 				popts->clk_adjust = pbsp->clk_adjust;  in fsl_ddr_board_options()
44 				popts->wrlvl_start = pbsp->wrlvl_start;  in fsl_ddr_board_options()
45 				popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
46 				popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
58 		       pbsp_highest->datarate_mhz_high);  in fsl_ddr_board_options()
59 		popts->clk_adjust = pbsp_highest->clk_adjust;  in fsl_ddr_board_options()
60 		popts->wrlvl_start = pbsp_highest->wrlvl_start;  in fsl_ddr_board_options()
61 		popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
62 		popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
70 		pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb,  in fsl_ddr_board_options()
71 		pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,  in fsl_ddr_board_options()
72 		pbsp->wrlvl_ctl_3);  in fsl_ddr_board_options()
75 	 * Factors to consider for half-strength driver enable:  in fsl_ddr_board_options()
76 	 *	- number of DIMMs installed  in fsl_ddr_board_options()
79 	popts->half_strength_driver_enable = 1;  in fsl_ddr_board_options()
80 	/* optimize cpo for erratum A-009942 */  in fsl_ddr_board_options()
81 	popts->cpo_sample = 0x59;  in fsl_ddr_board_options()
83 	popts->half_strength_driver_enable = 0;  in fsl_ddr_board_options()
88 	popts->wrlvl_override = 1;  in fsl_ddr_board_options()
89 	popts->wrlvl_sample = 0xf;  in fsl_ddr_board_options()
94 	popts->rtt_override = 0;  in fsl_ddr_board_options()
97 	popts->zq_en = 1;  in fsl_ddr_board_options()
99 	/* DHC_EN =1, ODT = 75 Ohm */  in fsl_ddr_board_options()
101 	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_120OHM);  in fsl_ddr_board_options()
102 	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_120OHM) |  in fsl_ddr_board_options()
105 	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
106 	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
140 	gd->ram_size = dram_size;  in dram_init()