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/OK3568_Linux_fs/kernel/drivers/clk/sunxi-ng/
H A Dccu-sun9i-a80.c270 .hw.init = CLK_HW_INIT_PARENTS("ahb0",
712 /* AHB0 bus gates */
713 static SUNXI_CCU_GATE(bus_fd_clk, "bus-fd", "ahb0",
715 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "ahb0",
717 static SUNXI_CCU_GATE(bus_gpu_ctrl_clk, "bus-gpu-ctrl", "ahb0",
719 static SUNXI_CCU_GATE(bus_ss_clk, "bus-ss", "ahb0",
721 static SUNXI_CCU_GATE(bus_mmc_clk, "bus-mmc", "ahb0",
723 static SUNXI_CCU_GATE(bus_nand0_clk, "bus-nand0", "ahb0",
725 static SUNXI_CCU_GATE(bus_nand1_clk, "bus-nand1", "ahb0",
727 static SUNXI_CCU_GATE(bus_sdram_clk, "bus-sdram", "ahb0",
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H A Dccu-sun8i-r.c52 static CLK_FIXED_FACTOR_HW(ahb0_clk, "ahb0", &ar100_clk.common.hw, 1, 1, 0);
54 static SUNXI_CCU_M(apb0_clk, "apb0", "ahb0", 0x0c, 0, 2, 0);
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Dallwinner,sun8i-a23-prcm.yaml165 ahb0: ahb0_clk {
171 clock-output-names = "ahb0";
177 clocks = <&ahb0>;
H A Dallwinner,sun6i-a31-prcm.yaml180 ahb0: ahb0_clk {
186 clock-output-names = "ahb0";
192 clocks = <&ahb0>;
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun9i.h30 u32 ahb0_cfg; /* 0x60 ahb0 clock configuration */
84 u32 ahb_gate0; /* 0x580 AHB0 Gating Register */
91 u32 ahb_reset0_cfg; /* 0x5a0 AHB0 Software Reset Register */
H A Dcpu_sun9i.h22 /* AHB0 Module */
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun9i-a80-ahb-clk.yaml49 clock-output-names = "ahb0";
H A Dallwinner,sun4i-a10-gates-clk.yaml32 - const: allwinner,sun9i-a80-ahb0-gates-clk
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun8i-a23-a33.dtsi606 ahb0: ahb0_clk { label
612 clock-output-names = "ahb0";
618 clocks = <&ahb0>;
H A Dsun9i-a80.dtsi217 ahb0: clk@06000060 { label
222 clock-output-names = "ahb0";
303 compatible = "allwinner,sun9i-a80-ahb0-gates-clk";
305 clocks = <&ahb0>;
H A Dsun6i-a31.dtsi1064 ahb0: ahb0_clk { label
1070 clock-output-names = "ahb0";
1076 clocks = <&ahb0>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun8i-a23-a33.dtsi740 ahb0: ahb0_clk { label
746 clock-output-names = "ahb0";
752 clocks = <&ahb0>;
H A Dsun6i-a31.dtsi1329 ahb0: ahb0_clk { label
1335 clock-output-names = "ahb0";
1341 clocks = <&ahb0>;
H A Dgemini.dtsi395 /* Bus interface AHB1 (AHB0) is totally tilted */
/OK3568_Linux_fs/kernel/drivers/clk/sunxi/
H A Dclk-simple-gates.c129 CLK_OF_DECLARE(sun9i_a80_ahb0, "allwinner,sun9i-a80-ahb0-gates-clk",
H A Dclk-sun9i-core.c149 * sun9i_a80_get_ahb_factors() - calculates p factor for AHB0/1/2
/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun9i.c41 /* AHB0: 120 MHz (PLL_PERIPH0 / 8) */ in clock_init_safe()
/OK3568_Linux_fs/kernel/drivers/clk/ingenic/
H A Dx1000-cgu.c266 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
H A Dx1830-cgu.c240 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
H A Djz4780-cgu.c355 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
/OK3568_Linux_fs/kernel/drivers/dma/
H A Damba-pl08x.c2747 (val & BIT(9)) ? "AHB0 and AHB1" : "AHB0", in pl08x_probe()